mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-12-25 09:15:36 +00:00
59 lines
2.6 KiB
Plaintext
59 lines
2.6 KiB
Plaintext
|
#
|
||
|
|
# RISC-V translation routines for the RV Instruction Set.
|
||
|
|
#
|
||
|
|
# Copyright (c) 2018 Peer Adelt, peer.adelt@hni.uni-paderborn.de
|
||
|
|
# Bastian Koppelmann, kbastian@mail.uni-paderborn.de
|
||
|
|
#
|
||
|
|
# This program is free software; you can redistribute it and/or modify it
|
||
|
|
# under the terms and conditions of the GNU General Public License,
|
||
|
|
# version 2 or later, as published by the Free Software Foundation.
|
||
|
|
#
|
||
|
|
# This program is distributed in the hope it will be useful, but WITHOUT
|
||
|
|
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||
|
|
# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||
|
|
# more details.
|
||
|
|
#
|
||
|
|
# You should have received a copy of the GNU General Public License along with
|
||
|
|
# this program. If not, see <http://www.gnu.org/licenses/>.
|
||
|
|
|
||
|
|
# This is concatenated with insn32.decode for risc64 targets.
|
||
|
|
# Most of the fields and formats are there.
|
||
|
|
|
||
|
|
%sh5 20:5
|
||
|
|
|
||
|
|
@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd
|
||
|
|
|
||
|
|
# *** RV64I Base Instruction Set (in addition to RV32I) ***
|
||
|
|
lwu ............ ..... 110 ..... 0000011 @i
|
||
|
|
ld ............ ..... 011 ..... 0000011 @i
|
||
|
|
sd ....... ..... ..... 011 ..... 0100011 @s
|
||
|
|
addiw ............ ..... 000 ..... 0011011 @i
|
||
|
|
slliw 0000000 ..... ..... 001 ..... 0011011 @sh5
|
||
|
|
srliw 0000000 ..... ..... 101 ..... 0011011 @sh5
|
||
|
|
sraiw 0100000 ..... ..... 101 ..... 0011011 @sh5
|
||
|
|
addw 0000000 ..... ..... 000 ..... 0111011 @r
|
||
|
|
subw 0100000 ..... ..... 000 ..... 0111011 @r
|
||
|
|
sllw 0000000 ..... ..... 001 ..... 0111011 @r
|
||
|
|
srlw 0000000 ..... ..... 101 ..... 0111011 @r
|
||
|
|
sraw 0100000 ..... ..... 101 ..... 0111011 @r
|
||
|
|
|
||
|
|
# *** RV64M Standard Extension (in addition to RV32M) ***
|
||
|
|
mulw 0000001 ..... ..... 000 ..... 0111011 @r
|
||
|
|
divw 0000001 ..... ..... 100 ..... 0111011 @r
|
||
|
|
divuw 0000001 ..... ..... 101 ..... 0111011 @r
|
||
|
|
remw 0000001 ..... ..... 110 ..... 0111011 @r
|
||
|
|
remuw 0000001 ..... ..... 111 ..... 0111011 @r
|
||
|
|
|
||
|
|
# *** RV64A Standard Extension (in addition to RV32A) ***
|
||
|
|
lr_d 00010 . . 00000 ..... 011 ..... 0101111 @atom_ld
|
||
|
|
sc_d 00011 . . ..... ..... 011 ..... 0101111 @atom_st
|
||
|
|
amoswap_d 00001 . . ..... ..... 011 ..... 0101111 @atom_st
|
||
|
|
amoadd_d 00000 . . ..... ..... 011 ..... 0101111 @atom_st
|
||
|
|
amoxor_d 00100 . . ..... ..... 011 ..... 0101111 @atom_st
|
||
|
|
amoand_d 01100 . . ..... ..... 011 ..... 0101111 @atom_st
|
||
|
|
amoor_d 01000 . . ..... ..... 011 ..... 0101111 @atom_st
|
||
|
|
amomin_d 10000 . . ..... ..... 011 ..... 0101111 @atom_st
|
||
|
|
amomax_d 10100 . . ..... ..... 011 ..... 0101111 @atom_st
|
||
|
|
amominu_d 11000 . . ..... ..... 011 ..... 0101111 @atom_st
|
||
|
|
amomaxu_d 11100 . . ..... ..... 011 ..... 0101111 @atom_st
|