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target-i386: Enable clflushopt/clwb/pcommit instructions

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These instructions are used by NVDIMM drivers and the specification is
located at:
https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf

There instructions are available on Skylake Server.

Backports commit f7fda280948a5e74aeb076ef346b991ecb173c56 from qemu
This commit is contained in:
Xiao Guangrong 2018-02-17 15:34:45 -05:00 committed by Lioncash
parent b558a66ba2
commit 003b2155a1
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 6 additions and 3 deletions
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6
qemu/target-i386/cpu.c
View file

@ -226,8 +226,8 @@ static const char *ext4_feature_name[] = {
static const char *cpuid_7_0_ebx_feature_name[] = {
"fsgsbase", "tsc_adjust", NULL, "bmi1", "hle", "avx2", NULL, "smep",
"bmi2", "erms", "invpcid", "rtm", NULL, NULL, "mpx", NULL,
"avx512f", NULL, "rdseed", "adx", "smap", NULL, NULL, NULL,
NULL, NULL, "avx512pf", "avx512er", "avx512cd", NULL, NULL, NULL,
"avx512f", NULL, "rdseed", "adx", "smap", NULL, "pcommit", "clflushopt",
"clwb", NULL, "avx512pf", "avx512er", "avx512cd", NULL, NULL, NULL,
};
static const char *cpuid_apm_edx_feature_name[] = {
@ -787,7 +787,7 @@ static X86CPUDefinition builtin_x86_defs[] = {
// FEAT_1_EDX
PPRO_FEATURES,
// FEAT_1_ECX
CPUID_EXT_SSE3,
CPUID_EXT_SSSE3,
},
},
{

3
qemu/target-i386/cpu.h
View file

@ -577,6 +577,9 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_7_0_EBX_RDSEED (1U << 18)
#define CPUID_7_0_EBX_ADX (1U << 19)
#define CPUID_7_0_EBX_SMAP (1U << 20)
#define CPUID_7_0_EBX_PCOMMIT (1U << 22) /* Persistent Commit */
#define CPUID_7_0_EBX_CLFLUSHOPT (1U << 23) /* Flush a Cache Line Optimized */
#define CPUID_7_0_EBX_CLWB (1U << 24) /* Cache Line Write Back */
#define CPUID_7_0_EBX_AVX512PF (1U << 26) /* AVX-512 Prefetch */
#define CPUID_7_0_EBX_AVX512ER (1U << 27) /* AVX-512 Exponential and Reciprocal */
#define CPUID_7_0_EBX_AVX512CD (1U << 28) /* AVX-512 Conflict Detection */