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target/m68k: add move16
move16 moves the source line to the destination line. Lines are aligned to 16-byte boundaries and are 16 bytes long. Backports commit 9d4f0429f3dc1dc6c67de3eaa3106e6c1cfa1524 from qemu
This commit is contained in:
parent
c652028eb5
commit
03096cb560
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@ -131,7 +131,15 @@ static void m68020_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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m68k_set_feature(env, M68K_FEATURE_CHK2);
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}
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#define m68030_cpu_initfn m68020_cpu_initfn
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#define m68040_cpu_initfn m68020_cpu_initfn
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static void m68040_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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M68kCPU *cpu = M68K_CPU(uc, obj);
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CPUM68KState *env = &cpu->env;
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m68020_cpu_initfn(uc, obj, opaque);
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m68k_set_feature(env, M68K_FEATURE_M68040);
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}
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static void m68060_cpu_initfn(struct uc_struct *uc, Object *obj, void *opaque)
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{
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@ -304,6 +304,7 @@ enum m68k_features {
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M68K_FEATURE_BKPT,
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M68K_FEATURE_RTD,
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M68K_FEATURE_CHK2,
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M68K_FEATURE_M68040, /* instructions specific to MC68040 */
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};
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static inline int m68k_feature(CPUM68KState *env, int feature)
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@ -4445,6 +4445,79 @@ DISAS_INSN(chk2)
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tcg_temp_free(tcg_ctx, reg);
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}
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static void m68k_copy_line(DisasContext *s, TCGv dst, TCGv src, int index)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGv addr;
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TCGv_i64 t0, t1;
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addr = tcg_temp_new(tcg_ctx);
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t0 = tcg_temp_new_i64(tcg_ctx);
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t1 = tcg_temp_new_i64(tcg_ctx);
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tcg_gen_andi_i32(tcg_ctx, addr, src, ~15);
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tcg_gen_qemu_ld64(s->uc, t0, addr, index);
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tcg_gen_addi_i32(tcg_ctx, addr, addr, 8);
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tcg_gen_qemu_ld64(s->uc, t1, addr, index);
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tcg_gen_andi_i32(tcg_ctx, addr, dst, ~15);
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tcg_gen_qemu_st64(s->uc, t0, addr, index);
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tcg_gen_addi_i32(tcg_ctx, addr, addr, 8);
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tcg_gen_qemu_st64(s->uc, t1, addr, index);
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tcg_temp_free_i64(tcg_ctx, t0);
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tcg_temp_free_i64(tcg_ctx, t1);
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tcg_temp_free(tcg_ctx, addr);
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}
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DISAS_INSN(move16_reg)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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int index = IS_USER(s);
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TCGv tmp;
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uint16_t ext;
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ext = read_im16(env, s);
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if ((ext & (1 << 15)) == 0) {
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gen_exception(s, s->insn_pc, EXCP_ILLEGAL);
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}
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m68k_copy_line(s, AREG(ext, 12), AREG(insn, 0), index);
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/* Ax can be Ay, so save Ay before incrementing Ax */
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tmp = tcg_temp_new(tcg_ctx);
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tcg_gen_mov_i32(tcg_ctx, tmp, AREG(ext, 12));
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tcg_gen_addi_i32(tcg_ctx, AREG(insn, 0), AREG(insn, 0), 16);
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tcg_gen_addi_i32(tcg_ctx, AREG(ext, 12), tmp, 16);
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tcg_temp_free(tcg_ctx, tmp);
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}
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DISAS_INSN(move16_mem)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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int index = IS_USER(s);
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TCGv reg, addr;
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reg = AREG(insn, 0);
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addr = tcg_const_i32(tcg_ctx, read_im32(env, s));
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if ((insn >> 3) & 1) {
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/* MOVE16 (xxx).L, (Ay) */
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m68k_copy_line(s, reg, addr, index);
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} else {
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/* MOVE16 (Ay), (xxx).L */
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m68k_copy_line(s, addr, reg, index);
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}
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tcg_temp_free(tcg_ctx, addr);
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if (((insn >> 3) & 2) == 0) {
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/* (Ay)+ */
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tcg_gen_addi_i32(tcg_ctx, reg, reg, 16);
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}
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}
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static TCGv gen_get_sr(DisasContext *s)
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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@ -5785,6 +5858,8 @@ void register_m68k_insns (CPUM68KState *env)
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INSN(fsave, f300, ffc0, FPU);
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INSN(intouch, f340, ffc0, CF_ISA_A);
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INSN(cpushl, f428, ff38, CF_ISA_A);
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INSN(move16_mem, f600, ffe0, M68040);
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INSN(move16_reg, f620, fff8, M68040);
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INSN(wddata, fb00, ff00, CF_ISA_A);
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INSN(wdebug, fbc0, ffc0, CF_ISA_A);
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#undef INSN
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