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target/mips: Clean up handling of CP0 register 17

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Clean up handling of CP0 register 17.

Backports commit 706ce142056b1304ea21db53b73d128295771a71 from qemu
This commit is contained in:
Aleksandar Markovic 2019-11-18 23:18:14 -05:00 committed by Lioncash
parent 04de1c3a5e
commit 0424d7bd24
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 16 additions and 16 deletions
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32
qemu/target/mips/translate.c
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@ -6749,12 +6749,12 @@ static void gen_mfhc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_17:
switch (sel) {
case 0:
case CP0_REG17__LLADDR:
gen_mfhc0_load64(ctx, arg, offsetof(CPUMIPSState, CP0_LLAddr),
ctx->CP0_LLAddr_shift);
register_name = "LLAddr";
break;
case 1:
case CP0_REG17__MAAR:
CP0_CHECK(ctx->mrp);
gen_helper_mfhc0_maar(s, arg, s->cpu_env);
register_name = "MAAR";
@ -6833,7 +6833,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_17:
switch (sel) {
case 0:
case CP0_REG17__LLADDR:
/*
* LLAddr is read-only (the only exception is bit 0 if LLB is
* supported); the CP0_LLAddr_rw_bitmask does not seem to be
@ -6842,7 +6842,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
*/
register_name = "LLAddr";
break;
case 1:
case CP0_REG17__MAAR:
CP0_CHECK(ctx->mrp);
gen_helper_mthc0_maar(s, s->cpu_env, arg);
register_name = "MAAR";
@ -7364,16 +7364,16 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_17:
switch (sel) {
case 0:
case CP0_REG17__LLADDR:
gen_helper_mfc0_lladdr(tcg_ctx, arg, tcg_ctx->cpu_env);
register_name = "LLAddr";
break;
case 1:
case CP0_REG17__MAAR:
CP0_CHECK(ctx->mrp);
gen_helper_mfc0_maar(tcg_ctx, arg, tcg_ctx->cpu_env);
register_name = "MAAR";
break;
case 2:
case CP0_REG17__MAARI:
CP0_CHECK(ctx->mrp);
gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_MAARI));
register_name = "MAARI";
@ -8100,16 +8100,16 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_17:
switch (sel) {
case 0:
case CP0_REG17__LLADDR:
gen_helper_mtc0_lladdr(tcg_ctx, tcg_ctx->cpu_env, arg);
register_name = "LLAddr";
break;
case 1:
case CP0_REG17__MAAR:
CP0_CHECK(ctx->mrp);
gen_helper_mtc0_maar(tcg_ctx, tcg_ctx->cpu_env, arg);
register_name = "MAAR";
break;
case 2:
case CP0_REG17__MAARI:
CP0_CHECK(ctx->mrp);
gen_helper_mtc0_maari(tcg_ctx, tcg_ctx->cpu_env, arg);
register_name = "MAARI";
@ -8833,16 +8833,16 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_17:
switch (sel) {
case 0:
case CP0_REG17__LLADDR:
gen_helper_dmfc0_lladdr(tcg_ctx, arg, tcg_ctx->cpu_env);
register_name = "LLAddr";
break;
case 1:
case CP0_REG17__MAAR:
CP0_CHECK(ctx->mrp);
gen_helper_dmfc0_maar(tcg_ctx, arg, tcg_ctx->cpu_env);
register_name = "MAAR";
break;
case 2:
case CP0_REG17__MAARI:
CP0_CHECK(ctx->mrp);
gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_MAARI));
register_name = "MAARI";
@ -9547,16 +9547,16 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break;
case CP0_REGISTER_17:
switch (sel) {
case 0:
case CP0_REG17__LLADDR:
gen_helper_mtc0_lladdr(tcg_ctx, tcg_ctx->cpu_env, arg);
register_name = "LLAddr";
break;
case 1:
case CP0_REG17__MAAR:
CP0_CHECK(ctx->mrp);
gen_helper_mtc0_maar(tcg_ctx, tcg_ctx->cpu_env, arg);
register_name = "MAAR";
break;
case 2:
case CP0_REG17__MAARI:
CP0_CHECK(ctx->mrp);
gen_helper_mtc0_maari(tcg_ctx, tcg_ctx->cpu_env, arg);
register_name = "MAARI";