mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2025-01-03 16:25:39 +00:00
hw/riscv: clint: Avoid using hard-coded timebase frequency
At present the CLINT timestamp is using a hard-coded timebase frequency value SIFIVE_CLINT_TIMEBASE_FREQ. This might not be true for all boards. Add a new 'timebase-freq' property to the CLINT device, and update various functions to accept this as a parameter. Backports a47ef6e93ab2ca1db8d5ecb61fda3c41f926a26b
This commit is contained in:
parent
d508a74a74
commit
1341de97f0
|
@ -233,7 +233,8 @@ struct CPURISCVState {
|
||||||
pmp_table_t pmp_state;
|
pmp_table_t pmp_state;
|
||||||
|
|
||||||
/* machine specific rdtime callback */
|
/* machine specific rdtime callback */
|
||||||
uint64_t (*rdtime_fn)(void);
|
uint64_t (*rdtime_fn)(uint32_t);
|
||||||
|
uint32_t rdtime_fn_arg;
|
||||||
|
|
||||||
/* True if in debugger mode. */
|
/* True if in debugger mode. */
|
||||||
bool debugger;
|
bool debugger;
|
||||||
|
@ -349,7 +350,8 @@ void riscv_cpu_swap_hypervisor_regs(CPURISCVState *env);
|
||||||
int riscv_cpu_claim_interrupts(RISCVCPU *cpu, uint32_t interrupts);
|
int riscv_cpu_claim_interrupts(RISCVCPU *cpu, uint32_t interrupts);
|
||||||
uint32_t riscv_cpu_update_mip(RISCVCPU *cpu, uint32_t mask, uint32_t value);
|
uint32_t riscv_cpu_update_mip(RISCVCPU *cpu, uint32_t mask, uint32_t value);
|
||||||
#define BOOL_TO_MASK(x) (-!!(x)) /* helper for riscv_cpu_update_mip value */
|
#define BOOL_TO_MASK(x) (-!!(x)) /* helper for riscv_cpu_update_mip value */
|
||||||
void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint64_t (*fn)(void));
|
void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint64_t (*fn)(uint32_t),
|
||||||
|
uint32_t arg);
|
||||||
#endif
|
#endif
|
||||||
void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv);
|
void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv);
|
||||||
|
|
||||||
|
|
|
@ -270,9 +270,11 @@ uint32_t riscv_cpu_update_mip(RISCVCPU *cpu, uint32_t mask, uint32_t value)
|
||||||
return old;
|
return old;
|
||||||
}
|
}
|
||||||
|
|
||||||
void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint64_t (*fn)(void))
|
void riscv_cpu_set_rdtime_fn(CPURISCVState *env, uint64_t (*fn)(uint32_t),
|
||||||
|
uint32_t arg)
|
||||||
{
|
{
|
||||||
env->rdtime_fn = fn;
|
env->rdtime_fn = fn;
|
||||||
|
env->rdtime_fn_arg = arg;
|
||||||
}
|
}
|
||||||
|
|
||||||
void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv)
|
void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv)
|
||||||
|
|
|
@ -296,7 +296,7 @@ static int read_time(CPURISCVState *env, int csrno, target_ulong *val)
|
||||||
return -RISCV_EXCP_ILLEGAL_INST;
|
return -RISCV_EXCP_ILLEGAL_INST;
|
||||||
}
|
}
|
||||||
|
|
||||||
*val = env->rdtime_fn() + delta;
|
*val = env->rdtime_fn(env->rdtime_fn_arg) + delta;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -309,7 +309,7 @@ static int read_timeh(CPURISCVState *env, int csrno, target_ulong *val)
|
||||||
return -RISCV_EXCP_ILLEGAL_INST;
|
return -RISCV_EXCP_ILLEGAL_INST;
|
||||||
}
|
}
|
||||||
|
|
||||||
*val = (env->rdtime_fn() + delta) >> 32;
|
*val = (env->rdtime_fn(env->rdtime_fn_arg) + delta) >> 32;
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
Loading…
Reference in a new issue