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target/i386: fix operand order for PDEP and PEXT
For PDEP and PEXT, the mask is provided in the memory (mod+r/m) operand, and therefore is loaded in s->T0 by gen_ldst_modrm. The source is provided in the second source operand (VEX.vvvv) and therefore is loaded in s->T1. Fix the order in which they are passed to the helpers. Backports 75b208c28316095c4685e8596ceb9e3f656592e2
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@ -4380,14 +4380,14 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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}
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ot = mo_64_32(s->dflag);
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gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
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/* Note that by zero-extending the mask operand, we
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/* Note that by zero-extending the source operand, we
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automatically handle zero-extending the result. */
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if (ot == MO_64) {
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tcg_gen_mov_tl(tcg_ctx, s->T1, cpu_regs[s->vex_v]);
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} else {
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tcg_gen_ext32u_tl(tcg_ctx, s->T1, cpu_regs[s->vex_v]);
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}
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gen_helper_pdep(tcg_ctx, cpu_regs[reg], s->T0, s->T1);
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gen_helper_pdep(tcg_ctx, cpu_regs[reg], s->T1, s->T0);
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break;
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case 0x2f5: /* pext Gy, By, Ey */
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@ -4398,14 +4398,14 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
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}
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ot = mo_64_32(s->dflag);
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gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
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/* Note that by zero-extending the mask operand, we
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/* Note that by zero-extending the source operand, we
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automatically handle zero-extending the result. */
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if (ot == MO_64) {
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tcg_gen_mov_tl(tcg_ctx, s->T1, cpu_regs[s->vex_v]);
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} else {
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tcg_gen_ext32u_tl(tcg_ctx, s->T1, cpu_regs[s->vex_v]);
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}
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gen_helper_pext(tcg_ctx, cpu_regs[reg], s->T0, s->T1);
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gen_helper_pext(tcg_ctx, cpu_regs[reg], s->T1, s->T0);
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break;
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case 0x1f6: /* adcx Gy, Ey */
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