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x86: define a new MSR based feature word -- FEATURE_WORDS_ARCH_CAPABILITIES

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Note RSBA is specially treated -- no matter host support it or not, qemu
pretends it is supported.

Backports commit d86f963694df27f11b3681ffd225c9362de1b634 from qemu
This commit is contained in:
Robert Hoo 2018-11-11 08:07:30 -05:00 committed by Lioncash
parent 947b021266
commit 24733280b2
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2 changed files with 29 additions and 0 deletions
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21
qemu/target/i386/cpu.c
View file

@ -1155,6 +1155,27 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
},
.tcg_features = ~0U,
},
// FEAT_ARCH_CAPABILITIES
{
.type = MSR_FEATURE_WORD,
.feat_names = {
"rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
"ssb-no", NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
},
.msr = {
.index = MSR_IA32_ARCH_CAPABILITIES,
.cpuid_dep = {
FEAT_7_0_EDX,
CPUID_7_0_EDX_ARCH_CAPABILITIES
}
},
},
};
typedef struct X86RegisterInfo32 {

8
qemu/target/i386/cpu.h
View file

@ -481,6 +481,7 @@ typedef enum FeatureWord {
FEAT_6_EAX, /* CPUID[6].EAX */
FEAT_XSAVE_COMP_LO, /* CPUID[EAX=0xd,ECX=0].EAX */
FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
FEAT_ARCH_CAPABILITIES,
FEATURE_WORDS,
} FeatureWord;
@ -710,6 +711,13 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS];
#define CPUID_TOPOLOGY_LEVEL_SMT (1U << 8)
#define CPUID_TOPOLOGY_LEVEL_CORE (2U << 8)
/* MSR Feature Bits */
#define MSR_ARCH_CAP_RDCL_NO (1U << 0)
#define MSR_ARCH_CAP_IBRS_ALL (1U << 1)
#define MSR_ARCH_CAP_RSBA (1U << 2)
#define MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY (1U << 3)
#define MSR_ARCH_CAP_SSB_NO (1U << 4)
#ifndef HYPERV_SPINLOCK_NEVER_RETRY
#define HYPERV_SPINLOCK_NEVER_RETRY 0xFFFFFFFF
#endif