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target-arm: Add extended RVBAR support
Added RVBAR_EL2 and RVBAR_EL3 CP register support. All RVBAR_EL# registers point to the same location and only the highest EL version exists at any one time. Backports commit be8e8128595b41b9f609c1507e67d121e65e7173 from qemu
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@ -2600,16 +2600,28 @@ void register_cp_regs_for_features(ARMCPU *cpu)
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ARM_CP_CONST, PL1_R, 0, NULL, cpu->mvfr2 },
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REGINFO_SENTINEL
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};
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ARMCPRegInfo rvbar = {
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"RVBAR_EL1", 0,12,0, 3,0,1, ARM_CP_STATE_AA64,
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ARM_CP_CONST, PL1_R, 0, NULL, cpu->rvbar
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};
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define_one_arm_cp_reg(cpu, &rvbar);
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/* RVBAR_EL1 is only implemented if EL1 is the highest EL */
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if (!arm_feature(env, ARM_FEATURE_EL3) &&
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!arm_feature(env, ARM_FEATURE_EL2)) {
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ARMCPRegInfo rvbar = {
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"RVBAR_EL1", 0,12,0, 3,0,1, ARM_CP_STATE_AA64,
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ARM_CP_CONST, PL1_R, 0, NULL, cpu->rvbar
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};
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define_one_arm_cp_reg(cpu, &rvbar);
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}
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define_arm_cp_regs(cpu, v8_idregs);
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define_arm_cp_regs(cpu, v8_cp_reginfo);
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}
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if (arm_feature(env, ARM_FEATURE_EL2)) {
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define_arm_cp_regs(cpu, v8_el2_cp_reginfo);
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/* RVBAR_EL2 is only implemented if EL2 is the highest EL */
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if (!arm_feature(env, ARM_FEATURE_EL3)) {
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ARMCPRegInfo rvbar = {
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"RVBAR_EL2", 0,12,0, 3,4,1, ARM_CP_STATE_AA64,
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ARM_CP_CONST, PL2_R, 0, NULL, cpu->rvbar
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};
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define_one_arm_cp_reg(cpu, &rvbar);
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}
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} else {
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/* If EL2 is missing but higher ELs are enabled, we need to
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* register the no_el2 reginfos.
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@ -2620,6 +2632,11 @@ void register_cp_regs_for_features(ARMCPU *cpu)
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}
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if (arm_feature(env, ARM_FEATURE_EL3)) {
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define_arm_cp_regs(cpu, el3_cp_reginfo);
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ARMCPRegInfo rvbar = {
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"RVBAR_EL3", 0,12,0, 3,6,1, ARM_CP_STATE_AA64,
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ARM_CP_CONST, PL3_R, 0, NULL, cpu->rvbar
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};
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define_one_arm_cp_reg(cpu, &rvbar);
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}
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if (arm_feature(env, ARM_FEATURE_MPU)) {
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/* These are the MPU registers prior to PMSAv6. Any new
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