yuzu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2025-05-17 07:22:13 +00:00
Code Issues Packages Projects Releases Wiki Activity

target-arm: Add extended RVBAR support

Browse source 
Added RVBAR_EL2 and RVBAR_EL3 CP register support. All RVBAR_EL# registers
point to the same location and only the highest EL version exists at any one
time.

Backports commit be8e8128595b41b9f609c1507e67d121e65e7173 from qemu
This commit is contained in:
Greg Bellows 2018-02-12 10:31:23 -05:00 committed by Lioncash
parent 6c33ec25fc
commit 2cce33295b
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 22 additions and 5 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

17
qemu/target-arm/helper.c
View file

@ -2600,16 +2600,28 @@ void register_cp_regs_for_features(ARMCPU *cpu)
ARM_CP_CONST, PL1_R, 0, NULL, cpu->mvfr2 }, ARM_CP_CONST, PL1_R, 0, NULL, cpu->mvfr2 },
REGINFO_SENTINEL REGINFO_SENTINEL
}; };
/* RVBAR_EL1 is only implemented if EL1 is the highest EL */
if (!arm_feature(env, ARM_FEATURE_EL3) &&
!arm_feature(env, ARM_FEATURE_EL2)) {
ARMCPRegInfo rvbar = { ARMCPRegInfo rvbar = {
"RVBAR_EL1", 0,12,0, 3,0,1, ARM_CP_STATE_AA64, "RVBAR_EL1", 0,12,0, 3,0,1, ARM_CP_STATE_AA64,
ARM_CP_CONST, PL1_R, 0, NULL, cpu->rvbar ARM_CP_CONST, PL1_R, 0, NULL, cpu->rvbar
}; };
define_one_arm_cp_reg(cpu, &rvbar); define_one_arm_cp_reg(cpu, &rvbar);
}
define_arm_cp_regs(cpu, v8_idregs); define_arm_cp_regs(cpu, v8_idregs);
define_arm_cp_regs(cpu, v8_cp_reginfo); define_arm_cp_regs(cpu, v8_cp_reginfo);
} }
if (arm_feature(env, ARM_FEATURE_EL2)) { if (arm_feature(env, ARM_FEATURE_EL2)) {
define_arm_cp_regs(cpu, v8_el2_cp_reginfo); define_arm_cp_regs(cpu, v8_el2_cp_reginfo);
/* RVBAR_EL2 is only implemented if EL2 is the highest EL */
if (!arm_feature(env, ARM_FEATURE_EL3)) {
ARMCPRegInfo rvbar = {
"RVBAR_EL2", 0,12,0, 3,4,1, ARM_CP_STATE_AA64,
ARM_CP_CONST, PL2_R, 0, NULL, cpu->rvbar
};
define_one_arm_cp_reg(cpu, &rvbar);
}
} else { } else {
/* If EL2 is missing but higher ELs are enabled, we need to /* If EL2 is missing but higher ELs are enabled, we need to
* register the no_el2 reginfos. * register the no_el2 reginfos.
@ -2620,6 +2632,11 @@ void register_cp_regs_for_features(ARMCPU *cpu)
} }
if (arm_feature(env, ARM_FEATURE_EL3)) { if (arm_feature(env, ARM_FEATURE_EL3)) {
define_arm_cp_regs(cpu, el3_cp_reginfo); define_arm_cp_regs(cpu, el3_cp_reginfo);
ARMCPRegInfo rvbar = {
"RVBAR_EL3", 0,12,0, 3,6,1, ARM_CP_STATE_AA64,
ARM_CP_CONST, PL3_R, 0, NULL, cpu->rvbar
};
define_one_arm_cp_reg(cpu, &rvbar);
} }
if (arm_feature(env, ARM_FEATURE_MPU)) { if (arm_feature(env, ARM_FEATURE_MPU)) {
/* These are the MPU registers prior to PMSAv6. Any new /* These are the MPU registers prior to PMSAv6. Any new