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target/riscv: Fix the translation of physical address

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The real physical address should add the 12 bits page offset. It also
causes the PMP wrong checking due to the minimum granularity of PMP is
4 byte, but we always get the physical address which is 4KB alignment,
that means, we always use the start address of the page to check PMP for
all addresses which in the same page.

Backports 9ef82119b10d996cef63af679af5c1a7a85e6c19
This commit is contained in:
Zong Li 2021-03-08 12:43:33 -05:00 committed by Lioncash
parent 55be7adad9
commit 2edba8fcfe
1 changed files with 3 additions and 2 deletions
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5
qemu/target/riscv/cpu_helper.c
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@ -537,7 +537,8 @@ restart:
/* for superpage mappings, make a fake leaf PTE for the TLB's /* for superpage mappings, make a fake leaf PTE for the TLB's
benefit. */ benefit. */
target_ulong vpn = addr >> PGSHIFT; target_ulong vpn = addr >> PGSHIFT;
*physical = (ppn | (vpn & ((1L << ptshift) - 1))) << PGSHIFT; *physical = ((ppn | (vpn & ((1L << ptshift) - 1))) << PGSHIFT) |
(addr & ~TARGET_PAGE_MASK);
/* set permissions on the TLB entry */ /* set permissions on the TLB entry */
if ((pte & PTE_R) || ((pte & PTE_X) && mxr)) { if ((pte & PTE_R) || ((pte & PTE_X) && mxr)) {
@ -624,7 +625,7 @@ hwaddr riscv_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
} }
} }
return phys_addr; return phys_addr & TARGET_PAGE_MASK;
} }
void riscv_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write, void riscv_cpu_unassigned_access(CPUState *cs, hwaddr addr, bool is_write,