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tcg: Make cpu_tbr a TCGv

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Commit 5d4e1a1081d3f1ec2908ff0eaebe312389971ab4
allows making the type concrete
This commit is contained in:
Lioncash 2018-02-21 01:08:00 -05:00
parent bbc8517cd2
commit 2f785b11d2
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GPG key ID: 4E3C3CC1031BA9C7
3 changed files with 6 additions and 8 deletions
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11
qemu/target-sparc/translate.c
View file

@ -3020,7 +3020,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
} }
break; break;
case 5: // tba case 5: // tba
tcg_gen_mov_tl(tcg_ctx, cpu_tmp0, *(TCGv *)tcg_ctx->cpu_tbr); tcg_gen_mov_tl(tcg_ctx, cpu_tmp0, tcg_ctx->cpu_tbr);
break; break;
case 6: // pstate case 6: // pstate
tcg_gen_ld32s_tl(tcg_ctx, cpu_tmp0, tcg_ctx->cpu_env, tcg_gen_ld32s_tl(tcg_ctx, cpu_tmp0, tcg_ctx->cpu_env,
@ -3087,7 +3087,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
#else #else
if (!supervisor(dc)) if (!supervisor(dc))
goto priv_insn; goto priv_insn;
gen_store_gpr(dc, rd, *(TCGv *)tcg_ctx->cpu_tbr); gen_store_gpr(dc, rd, tcg_ctx->cpu_tbr);
#endif #endif
break; break;
#endif #endif
@ -3968,7 +3968,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
} }
break; break;
case 5: // tba case 5: // tba
tcg_gen_mov_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_tbr, cpu_tmp0); tcg_gen_mov_tl(tcg_ctx, tcg_ctx->cpu_tbr, cpu_tmp0);
break; break;
case 6: // pstate case 6: // pstate
save_state(dc); save_state(dc);
@ -4040,7 +4040,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
#ifndef TARGET_SPARC64 #ifndef TARGET_SPARC64
if (!supervisor(dc)) if (!supervisor(dc))
goto priv_insn; goto priv_insn;
tcg_gen_xor_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_tbr, cpu_src1, cpu_src2); tcg_gen_xor_tl(tcg_ctx, tcg_ctx->cpu_tbr, cpu_src1, cpu_src2);
#else #else
CHECK_IU_FEATURE(dc, HYPV); CHECK_IU_FEATURE(dc, HYPV);
if (!hypervisor(dc)) if (!hypervisor(dc))
@ -5616,8 +5616,7 @@ void gen_intermediate_code_init(CPUSPARCState *env)
tcg_ctx->cpu_y = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, y), "y"); tcg_ctx->cpu_y = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, y), "y");
#ifndef CONFIG_USER_ONLY #ifndef CONFIG_USER_ONLY
tcg_ctx->cpu_tbr = g_malloc0(sizeof(TCGv)); tcg_ctx->cpu_tbr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, tbr),
*(TCGv *)tcg_ctx->cpu_tbr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, tbr),
"tbr"); "tbr");
#endif #endif

1
qemu/target-sparc/unicorn.c
View file

@ -42,7 +42,6 @@ void sparc_release(void *ctx)
g_free(tcg_ctx->cpu_fsr); g_free(tcg_ctx->cpu_fsr);
g_free(tcg_ctx->sparc_cpu_pc); g_free(tcg_ctx->sparc_cpu_pc);
g_free(tcg_ctx->cpu_npc); g_free(tcg_ctx->cpu_npc);
g_free(tcg_ctx->cpu_tbr);
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
g_free(tcg_ctx->cpu_regs_sparc[i]); g_free(tcg_ctx->cpu_regs_sparc[i]);

2
qemu/tcg/tcg.h
View file

@ -836,7 +836,7 @@ struct TCGContext {
void *cpu_fsr, *sparc_cpu_pc, *cpu_npc; void *cpu_fsr, *sparc_cpu_pc, *cpu_npc;
void *cpu_regs_sparc[32]; void *cpu_regs_sparc[32];
TCGv cpu_y; TCGv cpu_y;
void *cpu_tbr; TCGv cpu_tbr;
void *cpu_cond; void *cpu_cond;
void *cpu_gsr; void *cpu_gsr;
void *cpu_tick_cmpr, *cpu_stick_cmpr, *cpu_hstick_cmpr; void *cpu_tick_cmpr, *cpu_stick_cmpr, *cpu_hstick_cmpr;