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tcg: Make cpu_tbr a TCGv
Commit 5d4e1a1081d3f1ec2908ff0eaebe312389971ab4 allows making the type concrete
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parent
bbc8517cd2
commit
2f785b11d2
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@ -3020,7 +3020,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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}
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break;
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case 5: // tba
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tcg_gen_mov_tl(tcg_ctx, cpu_tmp0, *(TCGv *)tcg_ctx->cpu_tbr);
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tcg_gen_mov_tl(tcg_ctx, cpu_tmp0, tcg_ctx->cpu_tbr);
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break;
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case 6: // pstate
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tcg_gen_ld32s_tl(tcg_ctx, cpu_tmp0, tcg_ctx->cpu_env,
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@ -3087,7 +3087,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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#else
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if (!supervisor(dc))
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goto priv_insn;
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gen_store_gpr(dc, rd, *(TCGv *)tcg_ctx->cpu_tbr);
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gen_store_gpr(dc, rd, tcg_ctx->cpu_tbr);
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#endif
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break;
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#endif
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@ -3968,7 +3968,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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}
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break;
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case 5: // tba
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tcg_gen_mov_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_tbr, cpu_tmp0);
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tcg_gen_mov_tl(tcg_ctx, tcg_ctx->cpu_tbr, cpu_tmp0);
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break;
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case 6: // pstate
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save_state(dc);
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@ -4040,7 +4040,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned int insn, bool hook_ins
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#ifndef TARGET_SPARC64
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if (!supervisor(dc))
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goto priv_insn;
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tcg_gen_xor_tl(tcg_ctx, *(TCGv *)tcg_ctx->cpu_tbr, cpu_src1, cpu_src2);
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tcg_gen_xor_tl(tcg_ctx, tcg_ctx->cpu_tbr, cpu_src1, cpu_src2);
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#else
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CHECK_IU_FEATURE(dc, HYPV);
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if (!hypervisor(dc))
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@ -5616,8 +5616,7 @@ void gen_intermediate_code_init(CPUSPARCState *env)
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tcg_ctx->cpu_y = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, y), "y");
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#ifndef CONFIG_USER_ONLY
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tcg_ctx->cpu_tbr = g_malloc0(sizeof(TCGv));
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*(TCGv *)tcg_ctx->cpu_tbr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, tbr),
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tcg_ctx->cpu_tbr = tcg_global_mem_new(tcg_ctx, tcg_ctx->cpu_env, offsetof(CPUSPARCState, tbr),
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"tbr");
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#endif
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@ -42,7 +42,6 @@ void sparc_release(void *ctx)
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g_free(tcg_ctx->cpu_fsr);
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g_free(tcg_ctx->sparc_cpu_pc);
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g_free(tcg_ctx->cpu_npc);
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g_free(tcg_ctx->cpu_tbr);
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for (i = 0; i < 32; i++) {
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g_free(tcg_ctx->cpu_regs_sparc[i]);
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@ -836,7 +836,7 @@ struct TCGContext {
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void *cpu_fsr, *sparc_cpu_pc, *cpu_npc;
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void *cpu_regs_sparc[32];
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TCGv cpu_y;
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void *cpu_tbr;
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TCGv cpu_tbr;
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void *cpu_cond;
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void *cpu_gsr;
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void *cpu_tick_cmpr, *cpu_stick_cmpr, *cpu_hstick_cmpr;
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