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target-arm: Add comment about not implementing NSACR.RFR

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QEMU doesn't implement the NSACR.RFR bit, which is a permitted
IMPDEF in choice in ARMv7 and the only permitted choice in ARMv8.
Add a comment to bad_mode_switch() to note that this is why
FIQ is always a valid mode regardless of the CPU's Secure state.

Backports commit 52ff951b4f63a29593650a15efdf82f63d6d962d from qemu
This commit is contained in:
Peter Maydell 2018-02-20 22:19:35 -05:00 committed by Lioncash
parent a468baff61
commit 339e3e340e
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qemu/target-arm/helper.c
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@ -4517,6 +4517,9 @@ static int bad_mode_switch(CPUARMState *env, int mode)
case ARM_CPU_MODE_UND:
case ARM_CPU_MODE_IRQ:
case ARM_CPU_MODE_FIQ:
/* Note that we don't implement the IMPDEF NSACR.RFR which in v7
* allows FIQ mode to be Secure-only. (In v8 this doesn't exist.)
*/
return 0;
case ARM_CPU_MODE_MON:
return !arm_is_secure(env);