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target-arm: Fix IL bit reported for Thumb VFP and Neon traps

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All Thumb Neon and VFP instructions are 32 bits, so the IL
bit in the syndrome register should be set. Pass false to the
syn_* function's is_16bit argument rather than s->thumb
so we report the correct IL bit.

Backports commit 7d197d2db5e99e4c8b20f6771ddc7303acaa1c89 from qemu
This commit is contained in:
Peter Maydell 2018-02-20 11:39:36 -05:00 committed by Lioncash
parent 5b8ad0e2fc
commit 3d5b54cf4b
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 3 additions and 3 deletions
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6
qemu/target-arm/translate.c
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@ -3181,7 +3181,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
*/
if (s->fp_excp_el) {
gen_exception_insn(s, 4, EXCP_UDEF,
syn_fp_access_trap(1, 0xe, s->thumb), s->fp_excp_el);
syn_fp_access_trap(1, 0xe, false), s->fp_excp_el);
return 0;
}
@ -4513,7 +4513,7 @@ static int disas_neon_ls_insn(DisasContext *s, uint32_t insn)
*/
if (s->fp_excp_el) {
gen_exception_insn(s, 4, EXCP_UDEF,
syn_fp_access_trap(1, 0xe, s->thumb), s->fp_excp_el);
syn_fp_access_trap(1, 0xe, false), s->fp_excp_el);
return 0;
}
@ -5266,7 +5266,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
*/
if (s->fp_excp_el) {
gen_exception_insn(s, 4, EXCP_UDEF,
syn_fp_access_trap(1, 0xe, s->thumb), s->fp_excp_el);
syn_fp_access_trap(1, 0xe, false), s->fp_excp_el);
return 0;
}