aarch64: Add FPCR and FPSR registers

This commit is contained in:
MerryMage 2018-01-11 18:28:59 +00:00
parent f90c819a33
commit 4128f3b259
2 changed files with 16 additions and 0 deletions

View file

@ -293,6 +293,10 @@ typedef enum uc_arm64_reg {
UC_ARM64_REG_PSTATE, // PSTATE pseudoregister
//> floating point control and status registers
UC_ARM64_REG_FPCR,
UC_ARM64_REG_FPSR,
UC_ARM64_REG_ENDING, // <-- mark the end of the list of registers
//> alias registers

View file

@ -109,6 +109,12 @@ int arm64_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int co
case UC_ARM64_REG_PSTATE:
*(uint32_t *)value = pstate_read(&ARM_CPU(uc, mycpu)->env);
break;
case UC_ARM64_REG_FPCR:
*(uint32_t *)value = vfp_get_fpcr(&ARM_CPU(uc, mycpu)->env);
break;
case UC_ARM64_REG_FPSR:
*(uint32_t *)value = vfp_get_fpsr(&ARM_CPU(uc, mycpu)->env);
break;
}
}
}
@ -180,6 +186,12 @@ int arm64_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals,
case UC_ARM64_REG_PSTATE:
pstate_write(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value);
break;
case UC_ARM64_REG_FPCR:
vfp_set_fpcr(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value);
break;
case UC_ARM64_REG_FPSR:
vfp_set_fpsr(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value);
break;
}
}
}