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target/arm: Implement DBGVCR32_EL2 system register

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The DBGVCR_EL2 system register is needed to run a 32-bit
EL1 guest under a Linux EL2 64-bit hypervisor. Its only
purpose is to provide AArch64 with access to the state of
the DBGVCR AArch32 register. Since we only have a dummy
DBGVCR, implement a corresponding dummy DBGVCR32_EL2.

Backports commit 4d2ec4da1c2d60c9fd8bad137506870c2f980410 from qemu
This commit is contained in:
Peter Maydell 2018-03-01 23:02:26 -05:00 committed by Lioncash
parent 0db334c0e4
commit 468e2849cd
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1 changed files with 3 additions and 0 deletions
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qemu/target/arm/helper.c
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@ -3548,6 +3548,9 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {
{ "DBGVCR", 14,0,7, 0,0,0, 0,
ARM_CP_NOP, PL1_RW, 0, NULL, 0, 0, {0, 0},
access_tda },
{ "DBGVCR32_EL2", 0,0,7, 2,4,0, ARM_CP_STATE_AA64, ARM_CP_NOP,
PL2_RW, 0, NULL, 0, 0, {0, 0},
access_tda },
/* Dummy MDCCINT_EL1, since we don't implement the Debug Communications
* Channel but Linux may try to access this register. The 32-bit
* alias is DBGDCCINT.