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support xmm registers
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parent
236b6e9085
commit
4a8f52ae7f
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@ -202,6 +202,14 @@ class uc_x86_float80(ctypes.Structure):
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]
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class uc_x86_xmm(ctypes.Structure):
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"""128-bit xmm register"""
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_fields_ = [
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("lowdword", ctypes.c_uint64),
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("highdword", ctypes.c_uint64),
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]
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class Uc(object):
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def __init__(self, arch, mode):
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# verify version compatibility with the core before doing anything
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@ -260,6 +268,12 @@ class Uc(object):
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if status != uc.UC_ERR_OK:
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raise UcError(status)
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return reg.mantissa, reg.exponent
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if reg_id in range(x86_const.UC_X86_REG_XMM0, x86_const.UC_X86_REG_XMM0+8):
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reg = uc_x86_xmm()
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status = _uc.uc_reg_read(self._uch, reg_id, ctypes.byref(reg))
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if status != uc.UC_ERR_OK:
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raise UcError(status)
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return reg.lowdword | (reg.highdword << 64)
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# read to 64bit number to be safe
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reg = ctypes.c_int64(0)
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@ -284,6 +298,10 @@ class Uc(object):
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reg = uc_x86_float80()
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reg.mantissa = value[0]
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reg.exponent = value[1]
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if reg_id in range(x86_const.UC_X86_REG_XMM0, x86_const.UC_X86_REG_XMM0+8):
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reg = uc_x86_xmm()
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reg.lowdword = value & 0xffffffffffffffff
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reg.highdword = value >> 64
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if reg is None:
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# convert to 64bit number to be safe
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@ -195,6 +195,14 @@ int x86_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
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*(uint16_t*) value = fptag;
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}
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continue;
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case UC_X86_REG_XMM0 ... UC_X86_REG_XMM7:
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{
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float64 *dst = (float64*)value;
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XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0];
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dst[0] = reg->_d[0];
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dst[1] = reg->_d[1];
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continue;
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}
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}
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switch(uc->mode) {
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@ -666,6 +674,14 @@ int x86_reg_write(struct uc_struct *uc, unsigned int *regs, void *const *vals, i
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continue;
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}
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break;
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case UC_X86_REG_XMM0 ... UC_X86_REG_XMM7:
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{
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float64 *src = (float64*)value;
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XMMReg *reg = &X86_CPU(uc, mycpu)->env.xmm_regs[regid - UC_X86_REG_XMM0];
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reg->_d[0] = src[0];
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reg->_d[1] = src[1];
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continue;
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}
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}
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switch(uc->mode) {
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