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target/arm: Fix bitmask for PMCCFILTR writes

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It was shifted to the left one bit too few.

Backports commit ac57fd24cd864d42e7551f82266bc0930bd39547 from qemu
This commit is contained in:
Aaron Lindsay 2018-04-26 09:22:54 -04:00 committed by Lioncash
parent 99a0be89a8
commit 4ed7524444
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 1 additions and 1 deletions
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2
qemu/target/arm/helper.c
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@ -1014,7 +1014,7 @@ static void pmccfiltr_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
pmccntr_sync(env);
env->cp15.pmccfiltr_el0 = value & 0x7E000000;
env->cp15.pmccfiltr_el0 = value & 0xfc000000;
pmccntr_sync(env);
}