yuzu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2024-12-22 19:15:36 +00:00
Code Issues Packages Projects Releases Wiki Activity

target/arm: Decode aa64 armv8.1 scalar three same extra

Browse source 
Backports commit d9061ec3d27eb940402a7eafee3fb77ce1146ad4 from qemu
This commit is contained in:
Richard Henderson 2018-03-08 23:57:21 -05:00 committed by Lioncash
parent 774cbded7a
commit 4f585f71fb
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
25 changed files with 162 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
msvc/unicorn/aarch64-softmmu/aarch64-softmmu.vcxproj
View file

@ -71,6 +71,7 @@
<ClCompile Include="..\..\..\qemu\target\arm\psci.c" />
<ClCompile Include="..\..\..\qemu\target\arm\translate-a64.c" />
<ClCompile Include="..\..\..\qemu\target\arm\translate.c" />
<ClCompile Include="..\..\..\qemu\target\arm\vec_helper.c" />
<ClCompile Include="..\..\..\qemu\target\arm\unicorn_aarch64.c" />
<ClCompile Include="..\..\..\qemu\tcg\i386\tcg-target.c">
<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">true</ExcludedFromBuild>

3
msvc/unicorn/aarch64-softmmu/aarch64-softmmu.vcxproj.filters
View file

@ -134,6 +134,9 @@
<ClCompile Include="..\..\..\qemu\target\arm\translate.c">
<Filter>target\arm</Filter>
</ClCompile>
<ClCompile Include="..\..\..\qemu\target\arm\vec_helper.c">
<Filter>target\arm</Filter>
</ClCompile>
<ClCompile Include="..\..\..\qemu\target\arm\unicorn_aarch64.c">
<Filter>target\arm</Filter>
</ClCompile>

1
msvc/unicorn/aarch64eb-softmmu/aarch64eb-softmmu.vcxproj
View file

@ -71,6 +71,7 @@
<ClCompile Include="..\..\..\qemu\target\arm\psci.c" />
<ClCompile Include="..\..\..\qemu\target\arm\translate-a64.c" />
<ClCompile Include="..\..\..\qemu\target\arm\translate.c" />
<ClCompile Include="..\..\..\qemu\target\arm\vec_helper.c" />
<ClCompile Include="..\..\..\qemu\target\arm\unicorn_aarch64.c" />
<ClCompile Include="..\..\..\qemu\tcg\i386\tcg-target.c">
<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">true</ExcludedFromBuild>

3
msvc/unicorn/aarch64eb-softmmu/aarch64eb-softmmu.vcxproj.filters
View file

@ -134,6 +134,9 @@
<ClCompile Include="..\..\..\qemu\target\arm\translate.c">
<Filter>target\arm</Filter>
</ClCompile>
<ClCompile Include="..\..\..\qemu\target\arm\vec_helper.c">
<Filter>target\arm</Filter>
</ClCompile>
<ClCompile Include="..\..\..\qemu\target\arm\unicorn_aarch64.c">
<Filter>target\arm</Filter>
</ClCompile>

1
msvc/unicorn/arm-softmmu/arm-softmmu.vcxproj
View file

@ -67,6 +67,7 @@
<ClCompile Include="..\..\..\qemu\target\arm\op_helper.c" />
<ClCompile Include="..\..\..\qemu\target\arm\psci.c" />
<ClCompile Include="..\..\..\qemu\target\arm\translate.c" />
<ClCompile Include="..\..\..\qemu\target\arm\vec_helper.c" />
<ClCompile Include="..\..\..\qemu\target\arm\unicorn_arm.c" />
<ClCompile Include="..\..\..\qemu\tcg\i386\tcg-target.c">
<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">true</ExcludedFromBuild>

3
msvc/unicorn/arm-softmmu/arm-softmmu.vcxproj.filters
View file

@ -128,6 +128,9 @@
<ClCompile Include="..\..\..\qemu\target\arm\translate.c">
<Filter>target\arm</Filter>
</ClCompile>
<ClCompile Include="..\..\..\qemu\target\arm\vec_helper.c">
<Filter>target\arm</Filter>
</ClCompile>
<ClCompile Include="..\..\..\qemu\target\arm\arm-powerctl.c">
<Filter>target\arm</Filter>
</ClCompile>

1
msvc/unicorn/armeb-softmmu/armeb-softmmu.vcxproj
View file

@ -67,6 +67,7 @@
<ClCompile Include="..\..\..\qemu\target\arm\op_helper.c" />
<ClCompile Include="..\..\..\qemu\target\arm\psci.c" />
<ClCompile Include="..\..\..\qemu\target\arm\translate.c" />
<ClCompile Include="..\..\..\qemu\target\arm\vec_helper.c" />
<ClCompile Include="..\..\..\qemu\target\arm\unicorn_arm.c" />
<ClCompile Include="..\..\..\qemu\tcg\i386\tcg-target.c">
<ExcludedFromBuild Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">true</ExcludedFromBuild>

3
msvc/unicorn/armeb-softmmu/armeb-softmmu.vcxproj.filters
View file

@ -122,6 +122,9 @@
<ClCompile Include="..\..\..\qemu\target-arm\translate.c">
<Filter>target\arm</Filter>
</ClCompile>
<ClCompile Include="..\..\..\qemu\target\arm\vec_helper.c">
<Filter>target\arm</Filter>
</ClCompile>
<ClCompile Include="..\..\..\qemu\target-arm\unicorn_arm.c">
<Filter>target\arm</Filter>
</ClCompile>

4
qemu/aarch64.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_aarch64
#define helper_neon_qneg_s64 helper_neon_qneg_s64_aarch64
#define helper_neon_qneg_s8 helper_neon_qneg_s8_aarch64
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_aarch64
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_aarch64
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_aarch64
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_aarch64
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_aarch64
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_aarch64
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_aarch64

4
qemu/aarch64eb.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_aarch64eb
#define helper_neon_qneg_s64 helper_neon_qneg_s64_aarch64eb
#define helper_neon_qneg_s8 helper_neon_qneg_s8_aarch64eb
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_aarch64eb
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_aarch64eb
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_aarch64eb
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_aarch64eb
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_aarch64eb
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_aarch64eb
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_aarch64eb

4
qemu/arm.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_arm
#define helper_neon_qneg_s64 helper_neon_qneg_s64_arm
#define helper_neon_qneg_s8 helper_neon_qneg_s8_arm
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_arm
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_arm
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_arm
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_arm
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_arm
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_arm
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_arm

4
qemu/armeb.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_armeb
#define helper_neon_qneg_s64 helper_neon_qneg_s64_armeb
#define helper_neon_qneg_s8 helper_neon_qneg_s8_armeb
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_armeb
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_armeb
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_armeb
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_armeb
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_armeb
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_armeb
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_armeb

4
qemu/header_gen.py
View file

@ -1343,6 +1343,10 @@ symbols = (
'helper_neon_qneg_s32',
'helper_neon_qneg_s64',
'helper_neon_qneg_s8',
'helper_neon_qrdmlah_s16',
'helper_neon_qrdmlah_s32',
'helper_neon_qrdmlsh_s16',
'helper_neon_qrdmlsh_s32',
'helper_neon_qrdmulh_s16',
'helper_neon_qrdmulh_s32',
'helper_neon_qrshl_s16',

4
qemu/m68k.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_m68k
#define helper_neon_qneg_s64 helper_neon_qneg_s64_m68k
#define helper_neon_qneg_s8 helper_neon_qneg_s8_m68k
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_m68k
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_m68k
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_m68k
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_m68k
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_m68k
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_m68k
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_m68k

4
qemu/mips.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_mips
#define helper_neon_qneg_s64 helper_neon_qneg_s64_mips
#define helper_neon_qneg_s8 helper_neon_qneg_s8_mips
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_mips
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_mips
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_mips
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_mips
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_mips
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_mips
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_mips

4
qemu/mips64.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_mips64
#define helper_neon_qneg_s64 helper_neon_qneg_s64_mips64
#define helper_neon_qneg_s8 helper_neon_qneg_s8_mips64
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_mips64
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_mips64
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_mips64
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_mips64
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_mips64
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_mips64
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_mips64

4
qemu/mips64el.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_mips64el
#define helper_neon_qneg_s64 helper_neon_qneg_s64_mips64el
#define helper_neon_qneg_s8 helper_neon_qneg_s8_mips64el
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_mips64el
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_mips64el
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_mips64el
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_mips64el
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_mips64el
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_mips64el
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_mips64el

4
qemu/mipsel.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_mipsel
#define helper_neon_qneg_s64 helper_neon_qneg_s64_mipsel
#define helper_neon_qneg_s8 helper_neon_qneg_s8_mipsel
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_mipsel
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_mipsel
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_mipsel
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_mipsel
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_mipsel
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_mipsel
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_mipsel

4
qemu/powerpc.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_powerpc
#define helper_neon_qneg_s64 helper_neon_qneg_s64_powerpc
#define helper_neon_qneg_s8 helper_neon_qneg_s8_powerpc
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_powerpc
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_powerpc
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_powerpc
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_powerpc
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_powerpc
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_powerpc
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_powerpc

4
qemu/sparc.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_sparc
#define helper_neon_qneg_s64 helper_neon_qneg_s64_sparc
#define helper_neon_qneg_s8 helper_neon_qneg_s8_sparc
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_sparc
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_sparc
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_sparc
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_sparc
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_sparc
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_sparc
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_sparc

4
qemu/sparc64.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_sparc64
#define helper_neon_qneg_s64 helper_neon_qneg_s64_sparc64
#define helper_neon_qneg_s8 helper_neon_qneg_s8_sparc64
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_sparc64
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_sparc64
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_sparc64
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_sparc64
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_sparc64
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_sparc64
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_sparc64

2
qemu/target/arm/Makefile.objs
View file

@ -1,5 +1,5 @@
obj-y += translate.o op_helper.o helper.o cpu.o
obj-y += neon_helper.o iwmmxt_helper.o
obj-y += neon_helper.o iwmmxt_helper.o vec_helper.o
obj-$(CONFIG_SOFTMMU) += psci.o
obj-$(TARGET_AARCH64) += cpu64.o translate-a64.o helper-a64.o unicorn_aarch64.o
obj-$(TARGET_ARM) += unicorn_arm.o

4
qemu/target/arm/helper.h
View file

@ -367,8 +367,12 @@ DEF_HELPER_FLAGS_1(neon_rbit_u8, TCG_CALL_NO_RWG_SE, i32, i32)
DEF_HELPER_3(neon_qdmulh_s16, i32, env, i32, i32)
DEF_HELPER_3(neon_qrdmulh_s16, i32, env, i32, i32)
DEF_HELPER_4(neon_qrdmlah_s16, i32, env, i32, i32, i32)
DEF_HELPER_4(neon_qrdmlsh_s16, i32, env, i32, i32, i32)
DEF_HELPER_3(neon_qdmulh_s32, i32, env, i32, i32)
DEF_HELPER_3(neon_qrdmulh_s32, i32, env, i32, i32)
DEF_HELPER_4(neon_qrdmlah_s32, i32, env, s32, s32, s32)
DEF_HELPER_4(neon_qrdmlsh_s32, i32, env, s32, s32, s32)
DEF_HELPER_1(neon_narrow_u8, i32, i64)
DEF_HELPER_1(neon_narrow_u16, i32, i64)

85
qemu/target/arm/translate-a64.c
View file

@ -8099,6 +8099,90 @@ static void disas_simd_scalar_three_reg_same_fp16(DisasContext *s,
tcg_temp_free_ptr(tcg_ctx, fpst);
}
/* AdvSIMD scalar three same extra
* 31 30 29 28 24 23 22 21 20 16 15 14 11 10 9 5 4 0
* +-----+---+-----------+------+---+------+---+--------+---+----+----+
* | 0 1 | U | 1 1 1 1 0 | size | 0 | Rm | 1 | opcode | 1 | Rn | Rd |
* +-----+---+-----------+------+---+------+---+--------+---+----+----+
*/
static void disas_simd_scalar_three_reg_same_extra(DisasContext *s,
uint32_t insn)
{
TCGContext *tcg_ctx = s->uc->tcg_ctx;
int rd = extract32(insn, 0, 5);
int rn = extract32(insn, 5, 5);
int opcode = extract32(insn, 11, 4);
int rm = extract32(insn, 16, 5);
int size = extract32(insn, 22, 2);
bool u = extract32(insn, 29, 1);
TCGv_i32 ele1, ele2, ele3;
TCGv_i64 res;
int feature;
switch (u * 16 + opcode) {
case 0x10: /* SQRDMLAH (vector) */
case 0x11: /* SQRDMLSH (vector) */
if (size != 1 && size != 2) {
unallocated_encoding(s);
return;
}
feature = ARM_FEATURE_V8_RDM;
break;
default:
unallocated_encoding(s);
return;
}
if (!arm_dc_feature(s, feature)) {
unallocated_encoding(s);
return;
}
if (!fp_access_check(s)) {
return;
}
/* Do a single operation on the lowest element in the vector.
* We use the standard Neon helpers and rely on 0 OP 0 == 0
* with no side effects for all these operations.
* OPTME: special-purpose helpers would avoid doing some
* unnecessary work in the helper for the 16 bit cases.
*/
ele1 = tcg_temp_new_i32(tcg_ctx);
ele2 = tcg_temp_new_i32(tcg_ctx);
ele3 = tcg_temp_new_i32(tcg_ctx);
read_vec_element_i32(s, ele1, rn, 0, size);
read_vec_element_i32(s, ele2, rm, 0, size);
read_vec_element_i32(s, ele3, rd, 0, size);
switch (opcode) {
case 0x0: /* SQRDMLAH */
if (size == 1) {
gen_helper_neon_qrdmlah_s16(tcg_ctx, ele3, tcg_ctx->cpu_env, ele1, ele2, ele3);
} else {
gen_helper_neon_qrdmlah_s32(tcg_ctx, ele3, tcg_ctx->cpu_env, ele1, ele2, ele3);
}
break;
case 0x1: /* SQRDMLSH */
if (size == 1) {
gen_helper_neon_qrdmlsh_s16(tcg_ctx, ele3, tcg_ctx->cpu_env, ele1, ele2, ele3);
} else {
gen_helper_neon_qrdmlsh_s32(tcg_ctx, ele3, tcg_ctx->cpu_env, ele1, ele2, ele3);
}
break;
default:
g_assert_not_reached();
}
tcg_temp_free_i32(tcg_ctx, ele1);
tcg_temp_free_i32(tcg_ctx, ele2);
res = tcg_temp_new_i64(tcg_ctx);
tcg_gen_extu_i32_i64(tcg_ctx, res, ele3);
tcg_temp_free_i32(tcg_ctx, ele3);
write_fp_dreg(s, rd, res);
tcg_temp_free_i64(tcg_ctx, res);
}
static void handle_2misc_64(DisasContext *s, int opcode, bool u,
TCGv_i64 tcg_rd, TCGv_i64 tcg_rn,
TCGv_i32 tcg_rmode, TCGv_ptr tcg_fpstatus)
@ -12960,6 +13044,7 @@ static const AArch64DecodeTable data_proc_simd[] = {
{ 0x0e000800, 0xbf208c00, disas_simd_zip_trn },
{ 0x2e000000, 0xbf208400, disas_simd_ext },
{ 0x5e200400, 0xdf200400, disas_simd_scalar_three_reg_same },
{ 0x5e008400, 0xdf208400, disas_simd_scalar_three_reg_same_extra },
{ 0x5e200000, 0xdf200c00, disas_simd_scalar_three_reg_diff },
{ 0x5e200800, 0xdf3e0c00, disas_simd_scalar_two_reg_misc },
{ 0x5e300800, 0xdf3e0c00, disas_simd_scalar_pairwise },

4
qemu/x86_64.h
View file

@ -1337,6 +1337,10 @@
#define helper_neon_qneg_s32 helper_neon_qneg_s32_x86_64
#define helper_neon_qneg_s64 helper_neon_qneg_s64_x86_64
#define helper_neon_qneg_s8 helper_neon_qneg_s8_x86_64
#define helper_neon_qrdmlah_s16 helper_neon_qrdmlah_s16_x86_64
#define helper_neon_qrdmlah_s32 helper_neon_qrdmlah_s32_x86_64
#define helper_neon_qrdmlsh_s16 helper_neon_qrdmlsh_s16_x86_64
#define helper_neon_qrdmlsh_s32 helper_neon_qrdmlsh_s32_x86_64
#define helper_neon_qrdmulh_s16 helper_neon_qrdmulh_s16_x86_64
#define helper_neon_qrdmulh_s32 helper_neon_qrdmulh_s32_x86_64
#define helper_neon_qrshl_s16 helper_neon_qrshl_s16_x86_64