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target/arm: Implement v8.4-RCPC

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The v8.4-RCPC extension implements some new instructions:
* LDAPUR, LDAPURB, LDAPURH, LDAPRSB, LDAPRSH, LDAPRSW
* STLUR, STLURB, STLURH

These are all in a new subgroup of encodings that sits below the
top-level "Loads and Stores" group in the Arm ARM.

The STLUR* instructions have standard store-release semantics; the
LDAPUR* have Load-AcquirePC semantics, but (as with LDAPR*) we choose
to implement them as the slightly stronger Load-Acquire.

Backports commit a1229109dec4375259d3fff99f362405aab7917a from qemu
This commit is contained in:
Peter Maydell 2020-03-22 00:13:57 -04:00 committed by Lioncash
parent f72582bb7a
commit 5416c5a672
3 changed files with 97 additions and 1 deletions
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5
qemu/target/arm/cpu.h
View file

@ -3652,6 +3652,11 @@ static inline bool isar_feature_aa64_rcpc_8_3(const ARMISARegisters *id)
return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, LRCPC) != 0;
}
static inline bool isar_feature_aa64_rcpc_8_4(const ARMISARegisters *id)
{
return FIELD_EX64(id->id_aa64isar1, ID_AA64ISAR1, LRCPC) >= 2;
}
/*
* Feature tests for "does this exist in either 32-bit or 64-bit?"
*/

2
qemu/target/arm/cpu64.c
View file

@ -298,7 +298,7 @@ static void aarch64_max_initfn(struct uc_struct *uc, Object *obj, void *opaque)
t = FIELD_DP64(t, ID_AA64ISAR1, SB, 1);
t = FIELD_DP64(t, ID_AA64ISAR1, SPECRES, 1);
t = FIELD_DP64(t, ID_AA64ISAR1, FRINTTS, 1);
t = FIELD_DP64(t, ID_AA64ISAR1, LRCPC, 1); /* ARMv8.3-RCPC */
t = FIELD_DP64(t, ID_AA64ISAR1, LRCPC, 2); /* ARMv8.4-RCPC */
cpu->isar.id_aa64isar1 = t;
t = cpu->isar.id_aa64pfr0;

91
qemu/target/arm/translate-a64.c
View file

@ -3478,6 +3478,89 @@ static void disas_ldst_pac(DisasContext *s, uint32_t insn,
}
}
/*
* LDAPR/STLR (unscaled immediate)
*
* 31 30 24 22 21 12 10 5 0
* +------+-------------+-----+---+--------+-----+----+-----+
* | size | 0 1 1 0 0 1 | opc | 0 | imm9 | 0 0 | Rn | Rt |
* +------+-------------+-----+---+--------+-----+----+-----+
*
* Rt: source or destination register
* Rn: base register
* imm9: unscaled immediate offset
* opc: 00: STLUR*, 01/10/11: various LDAPUR*
* size: size of load/store
*/
static void disas_ldst_ldapr_stlr(DisasContext *s, uint32_t insn)
{
TCGContext *tcg_ctx = s->uc->tcg_ctx;
int rt = extract32(insn, 0, 5);
int rn = extract32(insn, 5, 5);
int offset = sextract32(insn, 12, 9);
int opc = extract32(insn, 22, 2);
int size = extract32(insn, 30, 2);
TCGv_i64 clean_addr, dirty_addr;
bool is_store = false;
bool is_signed = false;
bool extend = false;
bool iss_sf;
if (!dc_isar_feature(aa64_rcpc_8_4, s)) {
unallocated_encoding(s);
return;
}
switch (opc) {
case 0: /* STLURB */
is_store = true;
break;
case 1: /* LDAPUR* */
break;
case 2: /* LDAPURS* 64-bit variant */
if (size == 3) {
unallocated_encoding(s);
return;
}
is_signed = true;
break;
case 3: /* LDAPURS* 32-bit variant */
if (size > 1) {
unallocated_encoding(s);
return;
}
is_signed = true;
extend = true; /* zero-extend 32->64 after signed load */
break;
default:
g_assert_not_reached();
}
iss_sf = disas_ldst_compute_iss_sf(size, is_signed, opc);
if (rn == 31) {
gen_check_sp_alignment(s);
}
dirty_addr = read_cpu_reg_sp(s, rn, 1);
tcg_gen_addi_i64(tcg_ctx, dirty_addr, dirty_addr, offset);
clean_addr = clean_data_tbi(s, dirty_addr);
if (is_store) {
/* Store-Release semantics */
tcg_gen_mb(tcg_ctx, TCG_MO_ALL | TCG_BAR_STRL);
do_gpr_st(s, cpu_reg(s, rt), clean_addr, size, true, rt, iss_sf, true);
} else {
/*
* Load-AcquirePC semantics; we implement as the slightly more
* restrictive Load-Acquire.
*/
do_gpr_ld(s, cpu_reg(s, rt), clean_addr, size, is_signed, extend,
true, rt, iss_sf, true);
tcg_gen_mb(tcg_ctx, TCG_MO_ALL | TCG_BAR_LDAQ);
}
}
/* Load/store register (all forms) */
static void disas_ldst_reg(DisasContext *s, uint32_t insn)
{
@ -3831,6 +3914,14 @@ static void disas_ldst(DisasContext *s, uint32_t insn)
case 0x0d: /* AdvSIMD load/store single structure */
disas_ldst_single_struct(s, insn);
break;
case 0x19: /* LDAPR/STLR (unscaled immediate) */
if (extract32(insn, 10, 2) != 0 ||
extract32(insn, 21, 1) != 0) {
unallocated_encoding(s);
break;
}
disas_ldst_ldapr_stlr(s, insn);
break;
default:
unallocated_encoding(s);
break;