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target-arm: Fix and improve AA32 singlestep translation completion code
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e1701b069f
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@ -11691,48 +11691,45 @@ tb_end:
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instruction was a conditional branch or trap, and the PC has
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already been written. */
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if (unlikely(cs->singlestep_enabled || dc->ss_active)) {
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/* Make sure the pc is updated, and raise a debug exception. */
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/* Unconditional and "condition passed" instruction codepath. */
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gen_set_condexec(dc);
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switch (dc->is_jmp) {
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case DISAS_SWI:
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_SWI, syn_aa32_svc(dc->svc_imm, dc->thumb),
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default_exception_el(dc));
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break;
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case DISAS_HVC:
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_HVC, syn_aa32_hvc(dc->svc_imm), 2);
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break;
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case DISAS_SMC:
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_SMC, syn_aa32_smc(), 3);
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break;
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case DISAS_NEXT:
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case DISAS_UPDATE:
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gen_set_pc_im(dc, dc->pc);
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/* fall through */
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default:
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if (dc->ss_active) {
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gen_step_complete_exception(dc);
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} else {
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/* FIXME: Single stepping a WFI insn will not halt
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the CPU. */
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gen_exception_internal(dc, EXCP_DEBUG);
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}
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}
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if (dc->condjmp) {
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/* "Condition failed" instruction codepath. */
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gen_set_label(tcg_ctx, dc->condlabel);
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gen_set_condexec(dc);
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if (dc->is_jmp == DISAS_SWI) {
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_SWI, syn_aa32_svc(dc->svc_imm, dc->thumb),
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default_exception_el(dc));
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} else if (dc->is_jmp == DISAS_HVC) {
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_HVC, syn_aa32_hvc(dc->svc_imm), 2);
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} else if (dc->is_jmp == DISAS_SMC) {
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_SMC, syn_aa32_smc(), 3);
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} else if (dc->ss_active) {
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gen_set_pc_im(dc, dc->pc);
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if (dc->ss_active) {
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gen_step_complete_exception(dc);
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} else {
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gen_exception_internal(dc, EXCP_DEBUG);
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}
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gen_set_label(tcg_ctx, dc->condlabel);
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}
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if (dc->condjmp || dc->is_jmp == DISAS_NEXT ||
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dc->is_jmp == DISAS_UPDATE) {
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gen_set_pc_im(dc, dc->pc);
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dc->condjmp = 0;
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}
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gen_set_condexec(dc);
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if (dc->is_jmp == DISAS_SWI && !dc->condjmp) {
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_SWI, syn_aa32_svc(dc->svc_imm, dc->thumb),
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default_exception_el(dc));
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} else if (dc->is_jmp == DISAS_HVC && !dc->condjmp) {
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_HVC, syn_aa32_hvc(dc->svc_imm), 2);
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} else if (dc->is_jmp == DISAS_SMC && !dc->condjmp) {
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gen_ss_advance(dc);
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gen_exception(dc, EXCP_SMC, syn_aa32_smc(), 3);
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} else if (dc->ss_active) {
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gen_step_complete_exception(dc);
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} else {
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/* FIXME: Single stepping a WFI insn will not halt
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the CPU. */
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gen_exception_internal(dc, EXCP_DEBUG);
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}
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} else {
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/* While branches must always occur at the end of an IT block,
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