Add support for the ARM IPSR register. (#1067)

1. Create an enum name for the IPSR register.
2. Implement read and write of the IPSR via the xpsr helper functions.

Fixes #1065

Backports commit 6c319941a5462ee3a4af4593c371f5674394d6ce from unicorn.
This commit is contained in:
cfrantz 2019-02-28 16:40:48 -05:00 committed by Lioncash
parent c1267811e2
commit 5ad3a0ea82
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GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 7 additions and 0 deletions

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@ -133,6 +133,7 @@ typedef enum uc_arm_reg {
UC_ARM_REG_C13_C0_2,
UC_ARM_REG_C13_C0_3,
UC_ARM_REG_IPSR,
UC_ARM_REG_ENDING, // <-- mark the end of the list or registers
//> alias registers

View file

@ -93,6 +93,9 @@ int arm_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int coun
case UC_ARM_REG_FPEXC:
*(int32_t *)value = state->vfp.xregs[ARM_VFP_FPEXC];
break;
case UC_ARM_REG_IPSR:
*(uint32_t *)value = xpsr_read(state) & 0x1ff;
break;
case UC_ARM_REG_FPSCR:
*(int32_t *)value = vfp_get_fpscr(state);
break;
@ -157,6 +160,9 @@ int arm_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals, i
case UC_ARM_REG_FPSCR:
vfp_set_fpscr(state, *(uint32_t *)value);
break;
case UC_ARM_REG_IPSR:
xpsr_write(state, *(uint32_t *)value, 0x1ff);
break;
}
}
}