mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-12-23 05:35:32 +00:00
Add const to uc_reg_write and derivitives
This commit is contained in:
parent
f221195bf6
commit
5c3b681945
6
include/uc_priv.h
Normal file → Executable file
6
include/uc_priv.h
Normal file → Executable file
|
@ -24,7 +24,8 @@ typedef struct ModuleEntry {
|
||||||
typedef QTAILQ_HEAD(, ModuleEntry) ModuleTypeList;
|
typedef QTAILQ_HEAD(, ModuleEntry) ModuleTypeList;
|
||||||
|
|
||||||
// return 0 on success, -1 on failure
|
// return 0 on success, -1 on failure
|
||||||
typedef int (*reg_access_t)(uch handle, unsigned int regid, void *value);
|
typedef int (*reg_read_t)(uch handle, unsigned int regid, void *value);
|
||||||
|
typedef int (*reg_write_t)(uch handle, unsigned int regid, const void *value);
|
||||||
|
|
||||||
typedef void (*reg_reset_t)(uch handle);
|
typedef void (*reg_reset_t)(uch handle);
|
||||||
|
|
||||||
|
@ -70,7 +71,8 @@ struct uc_struct {
|
||||||
struct CPUTailQ cpus; // qemu/cpu-exec.c
|
struct CPUTailQ cpus; // qemu/cpu-exec.c
|
||||||
uc_err errnum; // qemu/cpu-exec.c
|
uc_err errnum; // qemu/cpu-exec.c
|
||||||
AddressSpace as;
|
AddressSpace as;
|
||||||
reg_access_t reg_read, reg_write;
|
reg_read_t reg_read;
|
||||||
|
reg_write_t reg_write;
|
||||||
reg_reset_t reg_reset;
|
reg_reset_t reg_reset;
|
||||||
|
|
||||||
uc_write_mem_t write_mem;
|
uc_write_mem_t write_mem;
|
||||||
|
|
2
include/unicorn/unicorn.h
Normal file → Executable file
2
include/unicorn/unicorn.h
Normal file → Executable file
|
@ -274,7 +274,7 @@ const char *uc_strerror(uc_err code);
|
||||||
for detailed error).
|
for detailed error).
|
||||||
*/
|
*/
|
||||||
UNICORN_EXPORT
|
UNICORN_EXPORT
|
||||||
uc_err uc_reg_write(uch handle, int regid, void *value);
|
uc_err uc_reg_write(uch handle, int regid, const void *value);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Read register value.
|
Read register value.
|
||||||
|
|
4
qemu/target-arm/unicorn.h
Normal file → Executable file
4
qemu/target-arm/unicorn.h
Normal file → Executable file
|
@ -6,9 +6,9 @@
|
||||||
|
|
||||||
// functions to read & write registers
|
// functions to read & write registers
|
||||||
int arm_reg_read(uch handle, unsigned int regid, void *value);
|
int arm_reg_read(uch handle, unsigned int regid, void *value);
|
||||||
int arm_reg_write(uch handle, unsigned int regid, void *value);
|
int arm_reg_write(uch handle, unsigned int regid, const void *value);
|
||||||
int arm64_reg_read(uch handle, unsigned int regid, void *value);
|
int arm64_reg_read(uch handle, unsigned int regid, void *value);
|
||||||
int arm64_reg_write(uch handle, unsigned int regid, void *value);
|
int arm64_reg_write(uch handle, unsigned int regid, const void *value);
|
||||||
|
|
||||||
void arm_reg_reset(uch handle);
|
void arm_reg_reset(uch handle);
|
||||||
void arm64_reg_reset(uch handle);
|
void arm64_reg_reset(uch handle);
|
||||||
|
|
2
qemu/target-arm/unicorn_aarch64.c
Normal file → Executable file
2
qemu/target-arm/unicorn_aarch64.c
Normal file → Executable file
|
@ -68,7 +68,7 @@ int arm64_reg_read(uch handle, unsigned int regid, void *value)
|
||||||
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
||||||
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
||||||
|
|
||||||
int arm64_reg_write(uch handle, unsigned int regid, void *value)
|
int arm64_reg_write(uch handle, unsigned int regid, const void *value)
|
||||||
{
|
{
|
||||||
CPUState *mycpu;
|
CPUState *mycpu;
|
||||||
struct uc_struct *uc = (struct uc_struct *) handle;
|
struct uc_struct *uc = (struct uc_struct *) handle;
|
||||||
|
|
2
qemu/target-arm/unicorn_arm.c
Normal file → Executable file
2
qemu/target-arm/unicorn_arm.c
Normal file → Executable file
|
@ -78,7 +78,7 @@ int arm_reg_read(uch handle, unsigned int regid, void *value)
|
||||||
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
||||||
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
||||||
|
|
||||||
int arm_reg_write(uch handle, unsigned int regid, void *value)
|
int arm_reg_write(uch handle, unsigned int regid, const void *value)
|
||||||
{
|
{
|
||||||
CPUState *mycpu;
|
CPUState *mycpu;
|
||||||
struct uc_struct *uc = (struct uc_struct *) handle;
|
struct uc_struct *uc = (struct uc_struct *) handle;
|
||||||
|
|
2
qemu/target-i386/unicorn.c
Normal file → Executable file
2
qemu/target-i386/unicorn.c
Normal file → Executable file
|
@ -536,7 +536,7 @@ int x86_reg_read(uch handle, unsigned int regid, void *value)
|
||||||
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
||||||
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
||||||
|
|
||||||
int x86_reg_write(uch handle, unsigned int regid, void *value)
|
int x86_reg_write(uch handle, unsigned int regid, const void *value)
|
||||||
{
|
{
|
||||||
CPUState *mycpu;
|
CPUState *mycpu;
|
||||||
struct uc_struct *uc = (struct uc_struct *) handle;
|
struct uc_struct *uc = (struct uc_struct *) handle;
|
||||||
|
|
2
qemu/target-i386/unicorn.h
Normal file → Executable file
2
qemu/target-i386/unicorn.h
Normal file → Executable file
|
@ -6,7 +6,7 @@
|
||||||
|
|
||||||
// functions to read & write registers
|
// functions to read & write registers
|
||||||
int x86_reg_read(uch handle, unsigned int regid, void *value);
|
int x86_reg_read(uch handle, unsigned int regid, void *value);
|
||||||
int x86_reg_write(uch handle, unsigned int regid, void *value);
|
int x86_reg_write(uch handle, unsigned int regid, const void *value);
|
||||||
|
|
||||||
void x86_reg_reset(uch handle);
|
void x86_reg_reset(uch handle);
|
||||||
|
|
||||||
|
|
2
qemu/target-m68k/unicorn.c
Normal file → Executable file
2
qemu/target-m68k/unicorn.c
Normal file → Executable file
|
@ -60,7 +60,7 @@ int m68k_reg_read(uch handle, unsigned int regid, void *value)
|
||||||
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
||||||
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
||||||
|
|
||||||
int m68k_reg_write(uch handle, unsigned int regid, void *value)
|
int m68k_reg_write(uch handle, unsigned int regid, const void *value)
|
||||||
{
|
{
|
||||||
struct uc_struct *uc = (struct uc_struct *) handle;
|
struct uc_struct *uc = (struct uc_struct *) handle;
|
||||||
CPUState *mycpu = first_cpu;
|
CPUState *mycpu = first_cpu;
|
||||||
|
|
2
qemu/target-m68k/unicorn.h
Normal file → Executable file
2
qemu/target-m68k/unicorn.h
Normal file → Executable file
|
@ -6,7 +6,7 @@
|
||||||
|
|
||||||
// functions to read & write registers
|
// functions to read & write registers
|
||||||
int m68k_reg_read(uch handle, unsigned int regid, void *value);
|
int m68k_reg_read(uch handle, unsigned int regid, void *value);
|
||||||
int m68k_reg_write(uch handle, unsigned int regid, void *value);
|
int m68k_reg_write(uch handle, unsigned int regid, const void *value);
|
||||||
|
|
||||||
void m68k_reg_reset(uch handle);
|
void m68k_reg_reset(uch handle);
|
||||||
|
|
||||||
|
|
2
qemu/target-mips/unicorn.c
Normal file → Executable file
2
qemu/target-mips/unicorn.c
Normal file → Executable file
|
@ -57,7 +57,7 @@ int mips_reg_read(uch handle, unsigned int regid, void *value)
|
||||||
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
||||||
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
||||||
|
|
||||||
int mips_reg_write(uch handle, unsigned int regid, void *value)
|
int mips_reg_write(uch handle, unsigned int regid, const void *value)
|
||||||
{
|
{
|
||||||
struct uc_struct *uc = (struct uc_struct *) handle;
|
struct uc_struct *uc = (struct uc_struct *) handle;
|
||||||
CPUState *mycpu = first_cpu;
|
CPUState *mycpu = first_cpu;
|
||||||
|
|
2
qemu/target-mips/unicorn.h
Normal file → Executable file
2
qemu/target-mips/unicorn.h
Normal file → Executable file
|
@ -6,7 +6,7 @@
|
||||||
|
|
||||||
// functions to read & write registers
|
// functions to read & write registers
|
||||||
int mips_reg_read(uch handle, unsigned int regid, void *value);
|
int mips_reg_read(uch handle, unsigned int regid, void *value);
|
||||||
int mips_reg_write(uch handle, unsigned int regid, void *value);
|
int mips_reg_write(uch handle, unsigned int regid, const void *value);
|
||||||
|
|
||||||
void mips_reg_reset(uch handle);
|
void mips_reg_reset(uch handle);
|
||||||
|
|
||||||
|
|
2
qemu/target-sparc/unicorn.c
Normal file → Executable file
2
qemu/target-sparc/unicorn.c
Normal file → Executable file
|
@ -71,7 +71,7 @@ int sparc_reg_read(uch handle, unsigned int regid, void *value)
|
||||||
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
||||||
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
||||||
|
|
||||||
int sparc_reg_write(uch handle, unsigned int regid, void *value)
|
int sparc_reg_write(uch handle, unsigned int regid, const void *value)
|
||||||
{
|
{
|
||||||
struct uc_struct *uc = (struct uc_struct *) handle;
|
struct uc_struct *uc = (struct uc_struct *) handle;
|
||||||
CPUState *mycpu = first_cpu;
|
CPUState *mycpu = first_cpu;
|
||||||
|
|
2
qemu/target-sparc/unicorn.h
Normal file → Executable file
2
qemu/target-sparc/unicorn.h
Normal file → Executable file
|
@ -6,7 +6,7 @@
|
||||||
|
|
||||||
// functions to read & write registers
|
// functions to read & write registers
|
||||||
int sparc_reg_read(uch handle, unsigned int regid, void *value);
|
int sparc_reg_read(uch handle, unsigned int regid, void *value);
|
||||||
int sparc_reg_write(uch handle, unsigned int regid, void *value);
|
int sparc_reg_write(uch handle, unsigned int regid, const void *value);
|
||||||
|
|
||||||
void sparc_reg_reset(uch handle);
|
void sparc_reg_reset(uch handle);
|
||||||
|
|
||||||
|
|
2
qemu/target-sparc/unicorn64.c
Normal file → Executable file
2
qemu/target-sparc/unicorn64.c
Normal file → Executable file
|
@ -54,7 +54,7 @@ int sparc_reg_read(uch handle, unsigned int regid, void *value)
|
||||||
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
|
||||||
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
|
||||||
|
|
||||||
int sparc_reg_write(uch handle, unsigned int regid, void *value)
|
int sparc_reg_write(uch handle, unsigned int regid, const void *value)
|
||||||
{
|
{
|
||||||
struct uc_struct *uc = (struct uc_struct *) handle;
|
struct uc_struct *uc = (struct uc_struct *) handle;
|
||||||
CPUState *mycpu = first_cpu;
|
CPUState *mycpu = first_cpu;
|
||||||
|
|
Loading…
Reference in a new issue