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tcg/mips: Add support for fence

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Backports commit 6f0b99104a396905870edc3049310ece29b6b8d6 from qemu
This commit is contained in:
Pranith Kumar 2018-02-26 03:17:01 -05:00 committed by Lioncash
parent e29cbe9640
commit 5f10101245
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 39 additions and 0 deletions
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39
qemu/tcg/mips/tcg-target.inc.c
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@ -292,6 +292,7 @@ typedef enum {
OPC_JALR = OPC_SPECIAL | 0x09,
OPC_MOVZ = OPC_SPECIAL | 0x0A,
OPC_MOVN = OPC_SPECIAL | 0x0B,
OPC_SYNC = OPC_SPECIAL | 0x0F,
OPC_MFHI = OPC_SPECIAL | 0x10,
OPC_MFLO = OPC_SPECIAL | 0x12,
OPC_MULT = OPC_SPECIAL | 0x18,
@ -339,6 +340,14 @@ typedef enum {
* backwards-compatible at the assembly level.
*/
OPC_MUL = use_mips32r6_instructions ? OPC_MUL_R6 : OPC_MUL_R5,
/* MIPS r6 introduced names for weaker variants of SYNC. These are
backward compatible to previous architecture revisions. */
OPC_SYNC_WMB = OPC_SYNC | 0x04 << 5,
OPC_SYNC_MB = OPC_SYNC | 0x10 << 5,
OPC_SYNC_ACQUIRE = OPC_SYNC | 0x11 << 5,
OPC_SYNC_RELEASE = OPC_SYNC | 0x12 << 5,
OPC_SYNC_RMB = OPC_SYNC | 0x13 << 5,
} MIPSInsn;
/*
@ -1384,6 +1393,32 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is_64)
#endif
}
static void tcg_out_mb(TCGContext *s, TCGArg a0)
{
static const MIPSInsn sync[] = {
/* Note that SYNC_MB is a slightly weaker than SYNC 0,
as the former is an ordering barrier and the latter
is a completion barrier. */
OPC_SYNC_MB,
OPC_SYNC_RMB,
OPC_SYNC_MB,
OPC_SYNC_MB,
OPC_SYNC_RELEASE,
OPC_SYNC_ACQUIRE,
OPC_SYNC_MB,
OPC_SYNC_MB,
OPC_SYNC_WMB,
OPC_SYNC_MB,
OPC_SYNC_MB,
OPC_SYNC_MB,
OPC_SYNC_RELEASE,
OPC_SYNC_MB,
OPC_SYNC_MB,
OPC_SYNC_MB,
};
tcg_out32(s, sync[a0 & TCG_MO_ALL]);
}
static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
const TCGArg *args, const int *const_args)
{
@ -1653,6 +1688,9 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc,
const_args[4], const_args[5], true);
break;
case INDEX_op_mb:
tcg_out_mb(s, a0);
break;
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */
case INDEX_op_call: /* Always emitted via tcg_out_call. */
@ -1733,6 +1771,7 @@ static const TCGTargetOpDef mips_op_defs[] = {
{ INDEX_op_qemu_ld_i64, { "L", "L", "lZ", "lZ" } },
{ INDEX_op_qemu_st_i64, { "SZ", "SZ", "SZ", "SZ" } },
#endif
{ INDEX_op_mb, { } },
{ -1 },
};