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target-arm: Add HPFAR_EL2
Backports commit 59e055307392fdf99b86c8cbcd33a7e261dcbdb1 from qemu
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9432e3a285
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@ -282,6 +282,7 @@ typedef struct CPUARMState {
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};
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uint64_t far_el[4];
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};
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uint64_t hpfar_el2;
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union { /* Translation result. */
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struct {
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uint64_t _unused_par_0;
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@ -2853,6 +2853,9 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {
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PL2_RW, 0, NULL, 0 },
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{ "MDCR_EL2", 0,1,1, 3,4,1, ARM_CP_STATE_BOTH, ARM_CP_CONST,
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PL2_RW, 0, NULL, 0 },
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{ "HPFAR_EL2", 0,6,0, 3,4,4, ARM_CP_STATE_BOTH, ARM_CP_CONST,
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PL2_RW, 0, NULL, 0, 0, {0, 0},
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access_el3_aa32ns_aa64any },
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REGINFO_SENTINEL
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};
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@ -3022,6 +3025,11 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {
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*/
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{ "MDCR_EL2", 0,1,1, 3,4,1, ARM_CP_STATE_BOTH, 0,
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PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.mdcr_el2), },
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{ "HPFAR", 15,6,0, 0,4,4, ARM_CP_STATE_AA32, 0,
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PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.hpfar_el2), {0, 0},
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access_el3_aa32ns },
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{ "HPFAR_EL2", 0,6,0, 3,4,4, ARM_CP_STATE_AA64, 0,
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PL2_RW, 0, NULL, 0, offsetof(CPUARMState, cp15.hpfar_el2) },
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REGINFO_SENTINEL
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};
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