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target/riscv: Respect MPRV and SPRV for floating point ops

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mark_fs_dirty() is the only place in translate.c that uses the
virt_enabled bool. Let's respect the contents of MSTATUS.MPRV and
HSTATUS.SPRV when setting the bool as this is used for performing
floating point operations when V=0.

Backports commit ae84dd0ab7eaf7e98cd6ee05b2063cce8ff9bc02 from qemu
This commit is contained in:
Alistair Francis 2020-03-22 01:53:48 -04:00 committed by Lioncash
parent 270808e22e
commit 74b8fd51f4
1 changed files with 15 additions and 1 deletions
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16
qemu/target/riscv/translate.c
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@ -780,7 +780,21 @@ static void riscv_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
ctx->mstatus_fs = ctx->base.tb->flags & TB_FLAGS_MSTATUS_FS; ctx->mstatus_fs = ctx->base.tb->flags & TB_FLAGS_MSTATUS_FS;
ctx->priv_ver = env->priv_ver; ctx->priv_ver = env->priv_ver;
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
ctx->virt_enabled = riscv_cpu_virt_enabled(env); if (riscv_has_ext(env, RVH)) {
ctx->virt_enabled = riscv_cpu_virt_enabled(env);
if (env->priv_ver == PRV_M &&
get_field(env->mstatus, MSTATUS_MPRV) &&
get_field(env->mstatus, MSTATUS_MPV)) {
ctx->virt_enabled = true;
} else if (env->priv == PRV_S &&
!riscv_cpu_virt_enabled(env) &&
get_field(env->hstatus, HSTATUS_SPRV) &&
get_field(env->hstatus, HSTATUS_SPV)) {
ctx->virt_enabled = true;
}
} else {
ctx->virt_enabled = false;
}
#else #else
ctx->virt_enabled = false; ctx->virt_enabled = false;
#endif #endif