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target/arm: Decode aa32 armv8.1 two reg and a scalar

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Backports commit 61adacc8f589539ac6b25cfcbd6e099357188974 from qemu
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Richard Henderson 2018-03-09 00:22:55 -05:00 committed by Lioncash
parent ca4ceb2dd7
commit 78b0b9c523
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 42 additions and 4 deletions
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46
qemu/target/arm/translate.c
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@ -62,6 +62,10 @@ static const char *regnames[] =
{ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
"r8", "r9", "r10", "r11", "r12", "r13", "r14", "pc" }; "r8", "r9", "r10", "r11", "r12", "r13", "r14", "pc" };
/* Function prototypes for gen_ functions calling Neon helpers. */
typedef void NeonGenThreeOpEnvFn(TCGContext *, TCGv_i32, TCGv_env, TCGv_i32,
TCGv_i32, TCGv_i32);
/* initialize TCG globals. */ /* initialize TCG globals. */
void arm_translate_init(struct uc_struct *uc) void arm_translate_init(struct uc_struct *uc)
{ {
@ -7141,11 +7145,45 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
} }
neon_store_reg64(tcg_ctx, tcg_ctx->cpu_V0, rd + pass); neon_store_reg64(tcg_ctx, tcg_ctx->cpu_V0, rd + pass);
} }
break; break;
default: /* 14 and 15 are RESERVED */ case 14: /* VQRDMLAH scalar */
return 1; case 15: /* VQRDMLSH scalar */
{
NeonGenThreeOpEnvFn *fn;
if (!arm_dc_feature(s, ARM_FEATURE_V8_RDM)) {
return 1;
}
if (u && ((rd | rn) & 1)) {
return 1;
}
if (op == 14) {
if (size == 1) {
fn = gen_helper_neon_qrdmlah_s16;
} else {
fn = gen_helper_neon_qrdmlah_s32;
}
} else {
if (size == 1) {
fn = gen_helper_neon_qrdmlsh_s16;
} else {
fn = gen_helper_neon_qrdmlsh_s32;
}
}
tmp2 = neon_get_scalar(s, size, rm);
for (pass = 0; pass < (u ? 4 : 2); pass++) {
tmp = neon_load_reg(tcg_ctx, rn, pass);
tmp3 = neon_load_reg(tcg_ctx, rd, pass);
fn(tcg_ctx, tmp, tcg_ctx->cpu_env, tmp, tmp2, tmp3);
tcg_temp_free_i32(tcg_ctx, tmp3);
neon_store_reg(tcg_ctx, rd, pass, tmp);
}
tcg_temp_free_i32(tcg_ctx, tmp2);
}
break;
default:
g_assert_not_reached();
} }
} }
} else { /* size == 3 */ } else { /* size == 3 */