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target/arm: Convert T16 branch and exchange
Backports commit a0ef07740425b679d010fac7d9954ae003c1b191 from qemu
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c690f562c4
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@ -24,6 +24,7 @@
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&s_rri_rot !extern s rn rd imm rot
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&s_rri_rot !extern s rn rd imm rot
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&s_rrrr !extern s rd rn rm ra
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&s_rrrr !extern s rd rn rm ra
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&ri !extern rd imm
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&ri !extern rd imm
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&r !extern rm
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&ldst_rr !extern p w u rn rt rm shimm shtype
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&ldst_rr !extern p w u rn rt rm shimm shtype
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&ldst_ri !extern p w u rn rt imm
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&ldst_ri !extern p w u rn rt imm
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&ldst_block !extern rn i b u w list
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&ldst_block !extern rn i b u w list
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@ -144,3 +145,12 @@ MOV_rxi 00100 ... ........ @arith_1i %s
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CMP_xri 00101 ... ........ @arith_1i s=1
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CMP_xri 00101 ... ........ @arith_1i s=1
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ADD_rri 00110 ... ........ @arith_1i %s
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ADD_rri 00110 ... ........ @arith_1i %s
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SUB_rri 00111 ... ........ @arith_1i %s
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SUB_rri 00111 ... ........ @arith_1i %s
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# Branch and exchange
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@branchr .... .... . rm:4 ... &r
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BX 0100 0111 0 .... 000 @branchr
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BLX_r 0100 0111 1 .... 000 @branchr
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BXNS 0100 0111 0 .... 100 @branchr
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BLXNS 0100 0111 1 .... 100 @branchr
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@ -8659,7 +8659,7 @@ static bool trans_BX(DisasContext *s, arg_BX *a)
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if (!ENABLE_ARCH_4T) {
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if (!ENABLE_ARCH_4T) {
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return false;
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return false;
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}
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}
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gen_bx(s, load_reg(s, a->rm));
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gen_bx_excret(s, load_reg(s, a->rm));
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return true;
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return true;
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}
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}
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@ -8687,6 +8687,32 @@ static bool trans_BLX_r(DisasContext *s, arg_BLX_r *a)
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return true;
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return true;
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}
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}
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/*
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* BXNS/BLXNS: only exist for v8M with the security extensions,
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* and always UNDEF if NonSecure. We don't implement these in
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* the user-only mode either (in theory you can use them from
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* Secure User mode but they are too tied in to system emulation).
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*/
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static bool trans_BXNS(DisasContext *s, arg_BXNS *a)
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{
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if (!s->v8m_secure || IS_USER_ONLY) {
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unallocated_encoding(s);
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} else {
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gen_bxns(s, a->rm);
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}
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return true;
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}
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static bool trans_BLXNS(DisasContext *s, arg_BLXNS *a)
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{
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if (!s->v8m_secure || IS_USER_ONLY) {
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unallocated_encoding(s);
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} else {
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gen_blxns(s, a->rm);
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}
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return true;
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}
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static bool trans_CLZ(DisasContext *s, arg_CLZ *a)
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static bool trans_CLZ(DisasContext *s, arg_CLZ *a)
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{
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{
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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TCGContext *tcg_ctx = s->uc->tcg_ctx;
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@ -11108,49 +11134,11 @@ static void disas_thumb_insn(DisasContext *s, uint32_t insn)
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}
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}
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break;
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break;
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case 3:
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case 3:
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{
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/* 0b0100_0111_xxxx_xxxx
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/* 0b0100_0111_xxxx_xxxx
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* - branch [and link] exchange thumb register
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* - branch [and link] exchange thumb register
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* In decodetree
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*/
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*/
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bool link = insn & (1 << 7);
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goto illegal_op;
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if (insn & 3) {
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goto undef;
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}
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if (link) {
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ARCH(5);
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}
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if ((insn & 4)) {
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/* BXNS/BLXNS: only exists for v8M with the
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* security extensions, and always UNDEF if NonSecure.
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* We don't implement these in the user-only mode
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* either (in theory you can use them from Secure User
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* mode but they are too tied in to system emulation.)
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*/
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if (!s->v8m_secure || IS_USER_ONLY) {
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goto undef;
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}
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if (link) {
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gen_blxns(s, rm);
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} else {
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gen_bxns(s, rm);
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}
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break;
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}
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/* BLX/BX */
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tmp = load_reg(s, rm);
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if (link) {
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val = (uint32_t)s->base.pc_next | 1;
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tmp2 = tcg_temp_new_i32(tcg_ctx);
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tcg_gen_movi_i32(tcg_ctx, tmp2, val);
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store_reg(s, 14, tmp2);
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gen_bx(s, tmp);
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} else {
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/* Only BX works as exception-return, not BLX */
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gen_bx_excret(s, tmp);
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}
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break;
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}
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}
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}
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break;
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break;
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}
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}
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