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target-arm: Don't try to set ESR IL bit in arm_cpu_do_interrupt_aarch64()

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Remove some incorrect code from arm_cpu_do_interrupt_aarch64()
which attempts to set the IL bit in the syndrome register based
on the value of env->thumb. This is wrong in several ways:
* IL doesn't indicate Thumb-vs-ARM, it indicates instruction
length (which may be 16 or 32 for Thumb and is always 32 for ARM)
* not every syndrome format uses IL like this -- for some IL is
always set, and for some it is always clear
* the code is changing esr_el[new_el] even for interrupt entry,
which is not supposed to modify ESR_ELx at all

Delete the code, and instead rely on the syndrome value in
env->exception.syndrome having already been set up with the
correct value of IL.

Backports commit 78f1edb19fe11fa0c5d0bf484db59a384f455d3c from qemu
This commit is contained in:
Peter Maydell 2018-02-24 16:49:51 -05:00 committed by Lioncash
parent dc8bf22d88
commit 806d72035e
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 0 additions and 3 deletions
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3
qemu/target-arm/helper.c
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@ -5611,9 +5611,6 @@ static void arm_cpu_do_interrupt_aarch64_(CPUState *cs)
env->elr_el[new_el] = env->pc;
} else {
env->banked_spsr[aarch64_banked_spsr_index(new_el)] = cpsr_read(env);
if (!env->thumb) {
env->cp15.esr_el[new_el] |= 1 << 25;
}
env->elr_el[new_el] = env->regs[15];
aarch64_sync_32_to_64(env);