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target/arm: Fix wrong use of FIELD_EX32 on ID_AA64DFR0

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We missed an instance of using FIELD_EX32 on a 64-bit ID
register, in isar_feature_aa64_pmu_8_4(). Fix it.

Backports commit 54117b90ffd8a3977917971c3bd99bb5242710d9 from qemu.
This commit is contained in:
Peter Maydell 2020-03-22 00:10:41 -04:00 committed by Lioncash
parent c3eaaf7c33
commit 8d12309fd8
1 changed files with 2 additions and 2 deletions
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4
qemu/target/arm/cpu.h
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@ -3643,8 +3643,8 @@ static inline bool isar_feature_aa64_pmu_8_1(const ARMISARegisters *id)
static inline bool isar_feature_aa64_pmu_8_4(const ARMISARegisters *id) static inline bool isar_feature_aa64_pmu_8_4(const ARMISARegisters *id)
{ {
return FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 && return FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) >= 5 &&
FIELD_EX32(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf; FIELD_EX64(id->id_aa64dfr0, ID_AA64DFR0, PMUVER) != 0xf;
} }
/* /*