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target-i386: clear bsp bit when designating bsp
Since the BSP bit is writable on real hardware, during reset all the CPUs which were not chosen to be the BSP should have their BSP bit cleared. This fix is required for KVM to work correctly when it changes the BSP bit. An additional fix is required for QEMU tcg to allow software to change the BSP bit. Backports commit 9cb11fd7539b5b787d8fb3834004804a58dd16ae from qemu
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@ -161,7 +161,7 @@ void apic_init_reset(struct uc_struct *uc, DeviceState *dev)
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}
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}
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void apic_designate_bsp(struct uc_struct *uc, DeviceState *dev)
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void apic_designate_bsp(struct uc_struct *uc, DeviceState *dev, bool bsp)
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{
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APICCommonState *s;
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@ -170,7 +170,11 @@ void apic_designate_bsp(struct uc_struct *uc, DeviceState *dev)
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}
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s = APIC_COMMON(uc, dev);
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if (bsp) {
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s->apicbase |= MSR_IA32_APICBASE_BSP;
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} else {
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s->apicbase &= ~MSR_IA32_APICBASE_BSP;
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}
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}
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static void apic_reset_common(struct uc_struct *uc, DeviceState *dev)
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@ -15,7 +15,7 @@ void apic_sipi(DeviceState *s);
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void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
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TPRAccess access);
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void apic_poll_irq(DeviceState *d);
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void apic_designate_bsp(struct uc_struct *uc, DeviceState *d);
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void apic_designate_bsp(struct uc_struct *uc, DeviceState *d, bool bsp);
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/* pc.c */
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DeviceState *cpu_get_current_apic(struct uc_struct *uc);
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@ -2289,9 +2289,7 @@ static void x86_cpu_reset(CPUState *s)
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#if !defined(CONFIG_USER_ONLY)
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/* We hard-wire the BSP to the first CPU. */
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if (s->cpu_index == 0) {
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apic_designate_bsp(env->uc, cpu->apic_state);
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}
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apic_designate_bsp(env->uc, cpu->apic_state, s->cpu_index == 0);
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s->halted = !cpu_is_bsp(cpu);
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#endif
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