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target/arm: Update ctr_el0_access for EL2

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Update to include checks against HCR_EL2.TID2.

Backports commit 97475a89375d62a7722e04ced9fbdf0b992f4b83 from qemu
This commit is contained in:
Richard Henderson 2020-03-21 15:31:47 -04:00 committed by Lioncash
parent 6886ba66d0
commit 8e2ac48ad0
1 changed files with 21 additions and 5 deletions
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24
qemu/target/arm/helper.c
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@ -5058,12 +5058,28 @@ static const ARMCPRegInfo el3_cp_reginfo[] = {
static CPAccessResult ctr_el0_access(CPUARMState *env, const ARMCPRegInfo *ri, static CPAccessResult ctr_el0_access(CPUARMState *env, const ARMCPRegInfo *ri,
bool isread) bool isread)
{ {
/* Only accessible in EL0 if SCTLR.UCT is set (and only in AArch64, int cur_el = arm_current_el(env);
* but the AArch32 CTR has its own reginfo struct)
*/ if (cur_el < 2) {
if (arm_current_el(env) == 0 && !(env->cp15.sctlr_el[1] & SCTLR_UCT)) { uint64_t hcr = arm_hcr_el2_eff(env);
if (cur_el == 0) {
if ((hcr & (HCR_E2H | HCR_TGE)) == (HCR_E2H | HCR_TGE)) {
if (!(env->cp15.sctlr_el[2] & SCTLR_UCT)) {
return CP_ACCESS_TRAP_EL2;
}
} else {
if (!(env->cp15.sctlr_el[1] & SCTLR_UCT)) {
return CP_ACCESS_TRAP; return CP_ACCESS_TRAP;
} }
if (hcr & HCR_TID2) {
return CP_ACCESS_TRAP_EL2;
}
}
} else if (hcr & HCR_TID2) {
return CP_ACCESS_TRAP_EL2;
}
}
if (arm_current_el(env) < 2 && arm_hcr_el2_eff(env) & HCR_TID2) { if (arm_current_el(env) < 2 && arm_hcr_el2_eff(env) & HCR_TID2) {
return CP_ACCESS_TRAP_EL2; return CP_ACCESS_TRAP_EL2;