mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2025-03-23 05:25:11 +00:00
exec: Add target-specific tlb bits to MemTxAttrs
These bits can be used to cache target-specific data in cputlb read from the page tables. Backports commit d3765835ed02f91f0c6cbb452874209a6af4a730 from qemu
This commit is contained in:
parent
cf3ac035bc
commit
9c2a5963d0
|
@ -35,6 +35,18 @@ typedef struct MemTxAttrs {
|
|||
unsigned int secure:1;
|
||||
/* Memory access is usermode (unprivileged) */
|
||||
unsigned int user:1;
|
||||
/* Requester ID (for MSI for example) */
|
||||
unsigned int requester_id:16;
|
||||
/*
|
||||
* The following are target-specific page-table bits. These are not
|
||||
* related to actual memory transactions at all. However, this structure
|
||||
* is part of the tlb_fill interface, cached in the cputlb structure,
|
||||
* and has unused bits. These fields will be read by target-specific
|
||||
* helpers using env->iotlb[mmu_idx][tlb_index()].attrs.target_tlb_bitN.
|
||||
*/
|
||||
unsigned int target_tlb_bit0 : 1;
|
||||
unsigned int target_tlb_bit1 : 1;
|
||||
unsigned int target_tlb_bit2 : 1;
|
||||
} MemTxAttrs;
|
||||
|
||||
/* Bus masters which don't specify any attributes will get this,
|
||||
|
|
Loading…
Reference in a new issue