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target-arm: Correct accessfn for CNTP_{CT}VAL_EL0

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Backports commit 12cde08aaf571de65d3fbbdf93c83f0a4321267f from qemu
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Edgar E. Iglesias 2018-02-12 21:35:41 -05:00 committed by Lioncash
parent 3951997c2a
commit a28d3e4bb7
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GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 2 additions and 2 deletions
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4
qemu/target-arm/helper.c
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@ -1156,7 +1156,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
gt_ptimer_access, gt_tval_read, gt_tval_write, },
{ "CNTP_TVAL_EL0", 0,14,2, 3,3,0, ARM_CP_STATE_AA64,
ARM_CP_NO_RAW | ARM_CP_IO, PL1_RW | PL0_R, 0, NULL, 0, 0, {0, 0},
NULL, gt_tval_read, gt_tval_write, },
gt_ptimer_access, gt_tval_read, gt_tval_write, },
{ "CNTV_TVAL", 15,14,3, 0,0,0, 0,
ARM_CP_NO_RAW | ARM_CP_IO, PL1_RW | PL0_R, 0, NULL, 0, 0, {0, 0},
gt_vtimer_access, gt_tval_read, gt_tval_write, },
@ -1182,7 +1182,7 @@ static const ARMCPRegInfo generic_timer_cp_reginfo[] = {
gt_ptimer_access, NULL, gt_cval_write, NULL, raw_write, arm_cp_reset_ignore, },
{ "CNTP_CVAL_EL0", 0,14,2, 3,3,2, ARM_CP_STATE_AA64,
ARM_CP_IO, PL1_RW | PL0_R, 0, NULL, 0, offsetof(CPUARMState, cp15.c14_timer[GTIMER_PHYS].cval), {0, 0},
gt_vtimer_access, NULL, gt_cval_write, NULL, raw_write, },
gt_ptimer_access, NULL, gt_cval_write, NULL, raw_write, },
{ "CNTV_CVAL", 15, 0,14, 0,3,0, 0,
ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, PL1_RW | PL0_R, 0, NULL, 0, offsetof(CPUARMState, cp15.c14_timer[GTIMER_VIRT].cval), {0, 0},
gt_vtimer_access, NULL, gt_cval_write, NULL, raw_write, arm_cp_reset_ignore, },