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target-mips: enable CM GCR in MIPS64R6-generic CPU
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@ -583,7 +583,7 @@ static const mips_def_t mips_defs[] =
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(2 << CP0C1_DS) | (4 << CP0C1_DL) | (3 << CP0C1_DA) |
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(1 << CP0C1_PC) | (1 << CP0C1_FP),
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MIPS_CONFIG2,
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MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_MSAP) |
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MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_CMGCR) | (1 << CP0C3_MSAP) |
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(1 << CP0C3_BP) | (1 << CP0C3_BI) | (1 << CP0C3_ULRI) |
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(1 << CP0C3_RXI) | (1 << CP0C3_LPA) | (1 << CP0C3_VInt),
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MIPS_CONFIG4 | (1U << CP0C4_M) | (2 << CP0C4_IE) |
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