target-mips: enable CM GCR in MIPS64R6-generic CPU

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Leon Alrae 2018-03-04 00:24:03 -05:00 committed by Lioncash
parent 22ca920e40
commit a338e9c855
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@ -583,7 +583,7 @@ static const mips_def_t mips_defs[] =
(2 << CP0C1_DS) | (4 << CP0C1_DL) | (3 << CP0C1_DA) |
(1 << CP0C1_PC) | (1 << CP0C1_FP),
MIPS_CONFIG2,
MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_MSAP) |
MIPS_CONFIG3 | (1U << CP0C3_M) | (1 << CP0C3_CMGCR) | (1 << CP0C3_MSAP) |
(1 << CP0C3_BP) | (1 << CP0C3_BI) | (1 << CP0C3_ULRI) |
(1 << CP0C3_RXI) | (1 << CP0C3_LPA) | (1 << CP0C3_VInt),
MIPS_CONFIG4 | (1U << CP0C4_M) | (2 << CP0C4_IE) |