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tcg: Remove tcg_gen_trunc_i64_i32

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Replacing it with tcg_gen_extrl_i64_i32.

Backports commit ecc7b3aa71f5fdcf9ee87e74ca811d988282641d from qemu
This commit is contained in:
Richard Henderson 2018-02-10 23:10:54 -05:00 committed by Lioncash
parent 58e939b91f
commit a3aaf5a864
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
6 changed files with 65 additions and 70 deletions
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60
qemu/target-arm/translate-a64.c
View file

@ -506,9 +506,9 @@ static inline void gen_set_NZ64(TCGContext *tcg_ctx, TCGv_i64 result)
TCGv_i64 flag = tcg_temp_new_i64(tcg_ctx);
tcg_gen_setcondi_i64(tcg_ctx, TCG_COND_NE, flag, result, 0);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_ZF, flag);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_ZF, flag);
tcg_gen_shri_i64(tcg_ctx, flag, result, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_NF, flag);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_NF, flag);
tcg_temp_free_i64(tcg_ctx, flag);
}
@ -518,8 +518,8 @@ static inline void gen_logic_CC(TCGContext *tcg_ctx, int sf, TCGv_i64 result)
if (sf) {
gen_set_NZ64(tcg_ctx, result);
} else {
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_ZF, result);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_NF, result);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_ZF, result);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_NF, result);
}
tcg_gen_movi_i32(tcg_ctx, tcg_ctx->cpu_CF, 0);
tcg_gen_movi_i32(tcg_ctx, tcg_ctx->cpu_VF, 0);
@ -538,7 +538,7 @@ static void gen_add_CC(DisasContext *s, int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv
tcg_gen_movi_i64(tcg_ctx, tmp, 0);
tcg_gen_add2_i64(tcg_ctx, result, flag, t0, tmp, t1, tmp);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_CF, flag);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_CF, flag);
gen_set_NZ64(tcg_ctx, result);
@ -547,7 +547,7 @@ static void gen_add_CC(DisasContext *s, int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv
tcg_gen_andc_i64(tcg_ctx, flag, flag, tmp);
tcg_temp_free_i64(tcg_ctx, tmp);
tcg_gen_shri_i64(tcg_ctx, flag, flag, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_VF, flag);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_VF, flag);
tcg_gen_mov_i64(tcg_ctx, dest, result);
tcg_temp_free_i64(tcg_ctx, result);
@ -559,8 +559,8 @@ static void gen_add_CC(DisasContext *s, int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv
TCGv_i32 tmp = tcg_temp_new_i32(tcg_ctx);
tcg_gen_movi_i32(tcg_ctx, tmp, 0);
tcg_gen_trunc_i64_i32(tcg_ctx, t0_32, t0);
tcg_gen_trunc_i64_i32(tcg_ctx, t1_32, t1);
tcg_gen_extrl_i64_i32(tcg_ctx, t0_32, t0);
tcg_gen_extrl_i64_i32(tcg_ctx, t1_32, t1);
tcg_gen_add2_i32(tcg_ctx, tcg_ctx->cpu_NF, tcg_ctx->cpu_CF, t0_32, tmp, t1_32, tmp);
tcg_gen_mov_i32(tcg_ctx, tcg_ctx->cpu_ZF, tcg_ctx->cpu_NF);
tcg_gen_xor_i32(tcg_ctx, tcg_ctx->cpu_VF, tcg_ctx->cpu_NF, t0_32);
@ -589,7 +589,7 @@ static void gen_sub_CC(DisasContext *s, int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv
gen_set_NZ64(tcg_ctx, result);
tcg_gen_setcond_i64(tcg_ctx, TCG_COND_GEU, flag, t0, t1);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_CF, flag);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_CF, flag);
tcg_gen_xor_i64(tcg_ctx, flag, result, t0);
tmp = tcg_temp_new_i64(tcg_ctx);
@ -597,7 +597,7 @@ static void gen_sub_CC(DisasContext *s, int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv
tcg_gen_and_i64(tcg_ctx, flag, flag, tmp);
tcg_temp_free_i64(tcg_ctx, tmp);
tcg_gen_shri_i64(tcg_ctx, flag, flag, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_VF, flag);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_VF, flag);
tcg_gen_mov_i64(tcg_ctx, dest, result);
tcg_temp_free_i64(tcg_ctx, flag);
tcg_temp_free_i64(tcg_ctx, result);
@ -607,8 +607,8 @@ static void gen_sub_CC(DisasContext *s, int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv
TCGv_i32 t1_32 = tcg_temp_new_i32(tcg_ctx);
TCGv_i32 tmp;
tcg_gen_trunc_i64_i32(tcg_ctx, t0_32, t0);
tcg_gen_trunc_i64_i32(tcg_ctx, t1_32, t1);
tcg_gen_extrl_i64_i32(tcg_ctx, t0_32, t0);
tcg_gen_extrl_i64_i32(tcg_ctx, t1_32, t1);
tcg_gen_sub_i32(tcg_ctx, tcg_ctx->cpu_NF, t0_32, t1_32);
tcg_gen_mov_i32(tcg_ctx, tcg_ctx->cpu_ZF, tcg_ctx->cpu_NF);
tcg_gen_setcond_i32(tcg_ctx, TCG_COND_GEU, tcg_ctx->cpu_CF, t0_32, t1_32);
@ -652,14 +652,14 @@ static void gen_adc_CC(DisasContext *s, int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv
tcg_gen_extu_i32_i64(tcg_ctx, cf_64, tcg_ctx->cpu_CF);
tcg_gen_add2_i64(tcg_ctx, result, cf_64, t0, tmp, cf_64, tmp);
tcg_gen_add2_i64(tcg_ctx, result, cf_64, result, cf_64, t1, tmp);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_CF, cf_64);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_CF, cf_64);
gen_set_NZ64(tcg_ctx, result);
tcg_gen_xor_i64(tcg_ctx, vf_64, result, t0);
tcg_gen_xor_i64(tcg_ctx, tmp, t0, t1);
tcg_gen_andc_i64(tcg_ctx, vf_64, vf_64, tmp);
tcg_gen_shri_i64(tcg_ctx, vf_64, vf_64, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_VF, vf_64);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_VF, vf_64);
tcg_gen_mov_i64(tcg_ctx, dest, result);
@ -673,8 +673,8 @@ static void gen_adc_CC(DisasContext *s, int sf, TCGv_i64 dest, TCGv_i64 t0, TCGv
t1_32 = tcg_temp_new_i32(tcg_ctx);
tmp = tcg_const_i32(tcg_ctx, 0);
tcg_gen_trunc_i64_i32(tcg_ctx, t0_32, t0);
tcg_gen_trunc_i64_i32(tcg_ctx, t1_32, t1);
tcg_gen_extrl_i64_i32(tcg_ctx, t0_32, t0);
tcg_gen_extrl_i64_i32(tcg_ctx, t1_32, t1);
tcg_gen_add2_i32(tcg_ctx, tcg_ctx->cpu_NF, tcg_ctx->cpu_CF, t0_32, tmp, tcg_ctx->cpu_CF, tmp);
tcg_gen_add2_i32(tcg_ctx, tcg_ctx->cpu_NF, tcg_ctx->cpu_CF, tcg_ctx->cpu_NF, tcg_ctx->cpu_CF, t1_32, tmp);
@ -1296,7 +1296,7 @@ static void gen_set_nzcv(TCGContext *tcg_ctx, TCGv_i64 tcg_rt)
TCGv_i32 nzcv = tcg_temp_new_i32(tcg_ctx);
/* take NZCV from R[t] */
tcg_gen_trunc_i64_i32(tcg_ctx, nzcv, tcg_rt);
tcg_gen_extrl_i64_i32(tcg_ctx, nzcv, tcg_rt);
/* bit 31, N */
tcg_gen_andi_i32(tcg_ctx, tcg_ctx->cpu_NF, nzcv, (1 << 31));
@ -3124,8 +3124,8 @@ static void shift_reg(TCGContext *tcg_ctx, TCGv_i64 dst, TCGv_i64 src, int sf,
TCGv_i32 t0, t1;
t0 = tcg_temp_new_i32(tcg_ctx);
t1 = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, t0, src);
tcg_gen_trunc_i64_i32(tcg_ctx, t1, shift_amount);
tcg_gen_extrl_i64_i32(tcg_ctx, t0, src);
tcg_gen_extrl_i64_i32(tcg_ctx, t1, shift_amount);
tcg_gen_rotr_i32(tcg_ctx, t0, t0, t1);
tcg_gen_extu_i32_i64(tcg_ctx, dst, t0);
tcg_temp_free_i32(tcg_ctx, t0);
@ -3681,7 +3681,7 @@ static void handle_clz(DisasContext *s, unsigned int sf,
gen_helper_clz64(tcg_ctx, tcg_rd, tcg_rn);
} else {
TCGv_i32 tcg_tmp32 = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_tmp32, tcg_rn);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_tmp32, tcg_rn);
gen_helper_clz(tcg_ctx, tcg_tmp32, tcg_tmp32);
tcg_gen_extu_i32_i64(tcg_ctx, tcg_rd, tcg_tmp32);
tcg_temp_free_i32(tcg_ctx, tcg_tmp32);
@ -3700,7 +3700,7 @@ static void handle_cls(DisasContext *s, unsigned int sf,
gen_helper_cls64(tcg_ctx, tcg_rd, tcg_rn);
} else {
TCGv_i32 tcg_tmp32 = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_tmp32, tcg_rn);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_tmp32, tcg_rn);
gen_helper_cls32(tcg_ctx, tcg_tmp32, tcg_tmp32);
tcg_gen_extu_i32_i64(tcg_ctx, tcg_rd, tcg_tmp32);
tcg_temp_free_i32(tcg_ctx, tcg_tmp32);
@ -3719,7 +3719,7 @@ static void handle_rbit(DisasContext *s, unsigned int sf,
gen_helper_rbit64(tcg_ctx, tcg_rd, tcg_rn);
} else {
TCGv_i32 tcg_tmp32 = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_tmp32, tcg_rn);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_tmp32, tcg_rn);
gen_helper_rbit(tcg_ctx, tcg_tmp32, tcg_tmp32);
tcg_gen_extu_i32_i64(tcg_ctx, tcg_rd, tcg_tmp32);
tcg_temp_free_i32(tcg_ctx, tcg_tmp32);
@ -5510,16 +5510,16 @@ static void disas_simd_across_lanes(DisasContext *s, uint32_t insn)
assert(elements == 4);
read_vec_element(s, tcg_elt, rn, 0, MO_32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_elt1, tcg_elt);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_elt1, tcg_elt);
read_vec_element(s, tcg_elt, rn, 1, MO_32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_elt2, tcg_elt);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_elt2, tcg_elt);
do_minmaxop(s, tcg_elt1, tcg_elt2, opcode, is_min, fpst);
read_vec_element(s, tcg_elt, rn, 2, MO_32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_elt2, tcg_elt);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_elt2, tcg_elt);
read_vec_element(s, tcg_elt, rn, 3, MO_32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_elt3, tcg_elt);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_elt3, tcg_elt);
do_minmaxop(s, tcg_elt2, tcg_elt3, opcode, is_min, fpst);
@ -7703,7 +7703,7 @@ static void handle_2misc_narrow(DisasContext *s, bool scalar,
static NeonGenNarrowFn * const xtnfns[3] = {
gen_helper_neon_narrow_u8,
gen_helper_neon_narrow_u16,
tcg_gen_trunc_i64_i32,
tcg_gen_extrl_i64_i32,
};
static NeonGenNarrowEnvFn * const sqxtunfns[3] = {
gen_helper_neon_unarrow_sat8,
@ -7737,10 +7737,10 @@ static void handle_2misc_narrow(DisasContext *s, bool scalar,
} else {
TCGv_i32 tcg_lo = tcg_temp_new_i32(tcg_ctx);
TCGv_i32 tcg_hi = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_lo, tcg_op);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_lo, tcg_op);
gen_helper_vfp_fcvt_f32_to_f16(tcg_ctx, tcg_lo, tcg_lo, tcg_ctx->cpu_env);
tcg_gen_shri_i64(tcg_ctx, tcg_op, tcg_op, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_hi, tcg_op);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_hi, tcg_op);
gen_helper_vfp_fcvt_f32_to_f16(tcg_ctx, tcg_hi, tcg_hi, tcg_ctx->cpu_env);
tcg_gen_deposit_i32(tcg_ctx, tcg_res[pass], tcg_lo, tcg_hi, 16, 16);
tcg_temp_free_i32(tcg_ctx, tcg_lo);
@ -8657,7 +8657,7 @@ static void handle_3rd_wide(DisasContext *s, int is_q, int is_u, int size,
static void do_narrow_high_u32(TCGContext *tcg_ctx, TCGv_i32 res, TCGv_i64 in)
{
tcg_gen_shri_i64(tcg_ctx, in, in, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, res, in);
tcg_gen_extrl_i64_i32(tcg_ctx, res, in);
}
static void do_narrow_round_high_u32(TCGContext *tcg_ctx, TCGv_i32 res, TCGv_i64 in)

46
qemu/target-arm/translate.c
View file

@ -1606,7 +1606,7 @@ static inline int gen_iwmmxt_shift(DisasContext *s, uint32_t insn, uint32_t mask
} else {
tmp = tcg_temp_new_i32(tcg_ctx);
iwmmxt_load_reg(s, tcg_ctx->cpu_V0, rd);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_V0);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_V0);
}
tcg_gen_andi_i32(tcg_ctx, tmp, tmp, mask);
tcg_gen_mov_i32(tcg_ctx, dest, tmp);
@ -1631,9 +1631,9 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
rdhi = (insn >> 16) & 0xf;
if (insn & ARM_CP_RW_BIT) { /* TMRRC */
iwmmxt_load_reg(s, tcg_ctx->cpu_V0, wrd);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_R[rdlo], tcg_ctx->cpu_V0);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_R[rdlo], tcg_ctx->cpu_V0);
tcg_gen_shri_i64(tcg_ctx, tcg_ctx->cpu_V0, tcg_ctx->cpu_V0, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_R[rdhi], tcg_ctx->cpu_V0);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_R[rdhi], tcg_ctx->cpu_V0);
} else { /* TMCRR */
tcg_gen_concat_i32_i64(tcg_ctx, tcg_ctx->cpu_V0, tcg_ctx->cpu_R[rdlo], tcg_ctx->cpu_R[rdhi]);
iwmmxt_store_reg(s, tcg_ctx->cpu_V0, wrd);
@ -1688,15 +1688,15 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
if (insn & (1 << 22)) { /* WSTRD */
gen_aa32_st64(s, tcg_ctx->cpu_M0, addr, get_mem_index(s));
} else { /* WSTRW wRd */
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
gen_aa32_st32(s, tmp, addr, get_mem_index(s));
}
} else {
if (insn & (1 << 22)) { /* WSTRH */
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
gen_aa32_st16(s, tmp, addr, get_mem_index(s));
} else { /* WSTRB */
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
gen_aa32_st8(s, tmp, addr, get_mem_index(s));
}
}
@ -1996,7 +1996,7 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
switch ((insn >> 22) & 3) {
case 0:
tcg_gen_shri_i64(tcg_ctx, tcg_ctx->cpu_M0, tcg_ctx->cpu_M0, (insn & 7) << 3);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
if (insn & 8) {
tcg_gen_ext8s_i32(tcg_ctx, tmp, tmp);
} else {
@ -2005,7 +2005,7 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
break;
case 1:
tcg_gen_shri_i64(tcg_ctx, tcg_ctx->cpu_M0, tcg_ctx->cpu_M0, (insn & 3) << 4);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
if (insn & 8) {
tcg_gen_ext16s_i32(tcg_ctx, tmp, tmp);
} else {
@ -2014,7 +2014,7 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t insn)
break;
case 2:
tcg_gen_shri_i64(tcg_ctx, tcg_ctx->cpu_M0, tcg_ctx->cpu_M0, (insn & 1) << 5);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_M0);
break;
}
store_reg(s, rd, tmp);
@ -2678,9 +2678,9 @@ static int disas_dsp_insn(DisasContext *s, uint32_t insn)
if (insn & ARM_CP_RW_BIT) { /* MRA */
iwmmxt_load_reg(s, tcg_ctx->cpu_V0, acc);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_R[rdlo], tcg_ctx->cpu_V0);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_R[rdlo], tcg_ctx->cpu_V0);
tcg_gen_shri_i64(tcg_ctx, tcg_ctx->cpu_V0, tcg_ctx->cpu_V0, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_ctx->cpu_R[rdhi], tcg_ctx->cpu_V0);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_ctx->cpu_R[rdhi], tcg_ctx->cpu_V0);
tcg_gen_andi_i32(tcg_ctx, tcg_ctx->cpu_R[rdhi], tcg_ctx->cpu_R[rdhi], (1 << (40 - 32)) - 1);
} else { /* MAR */
tcg_gen_concat_i32_i64(tcg_ctx, tcg_ctx->cpu_V0, tcg_ctx->cpu_R[rdlo], tcg_ctx->cpu_R[rdhi]);
@ -3025,7 +3025,7 @@ static int handle_vcvt(DisasContext *s, uint32_t insn, uint32_t rd, uint32_t rm,
} else {
gen_helper_vfp_tould(tcg_ctx, tcg_res, tcg_double, tcg_shift, fpst);
}
tcg_gen_trunc_i64_i32(tcg_ctx, tcg_tmp, tcg_res);
tcg_gen_extrl_i64_i32(tcg_ctx, tcg_tmp, tcg_res);
tcg_gen_st_f32(tcg_ctx, tcg_tmp, tcg_ctx->cpu_env, vfp_reg_offset(0, rd));
tcg_temp_free_i32(tcg_ctx, tcg_tmp);
tcg_temp_free_i64(tcg_ctx, tcg_res);
@ -4766,7 +4766,7 @@ static inline void gen_neon_narrow(DisasContext *s, int size, TCGv_i32 dest, TCG
switch (size) {
case 0: gen_helper_neon_narrow_u8(tcg_ctx, dest, src); break;
case 1: gen_helper_neon_narrow_u16(tcg_ctx, dest, src); break;
case 2: tcg_gen_trunc_i64_i32(tcg_ctx, dest, src); break;
case 2: tcg_gen_extrl_i64_i32(tcg_ctx, dest, src); break;
default: abort();
}
}
@ -6350,7 +6350,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
break;
case 2:
tcg_gen_shri_i64(tcg_ctx, tcg_ctx->cpu_V0, tcg_ctx->cpu_V0, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_V0);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_V0);
break;
default: abort();
}
@ -6365,7 +6365,7 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn)
case 2:
tcg_gen_addi_i64(tcg_ctx, tcg_ctx->cpu_V0, tcg_ctx->cpu_V0, 1u << 31);
tcg_gen_shri_i64(tcg_ctx, tcg_ctx->cpu_V0, tcg_ctx->cpu_V0, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_V0);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tcg_ctx->cpu_V0);
break;
default: abort();
}
@ -7317,11 +7317,11 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
tcg_gen_ld_i64(tcg_ctx, tmp64, tcg_ctx->cpu_env, ri->fieldoffset);
}
tmp = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tmp64);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tmp64);
store_reg(s, rt, tmp);
tcg_gen_shri_i64(tcg_ctx, tmp64, tmp64, 32);
tmp = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tmp64);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tmp64);
tcg_temp_free_i64(tcg_ctx, tmp64);
store_reg(s, rt2, tmp);
} else {
@ -7420,11 +7420,11 @@ static void gen_storeq_reg(DisasContext *s, int rlow, int rhigh, TCGv_i64 val)
TCGContext *tcg_ctx = s->uc->tcg_ctx;
TCGv_i32 tmp;
tmp = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, val);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, val);
store_reg(s, rlow, tmp);
tmp = tcg_temp_new_i32(tcg_ctx);
tcg_gen_shri_i64(tcg_ctx, val, val, 32);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, val);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, val);
store_reg(s, rhigh, tmp);
}
@ -8115,7 +8115,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) // qq
tmp64 = gen_muls_i64_i32(s, tmp, tmp2);
tcg_gen_shri_i64(tcg_ctx, tmp64, tmp64, 16);
tmp = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tmp64);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tmp64);
tcg_temp_free_i64(tcg_ctx, tmp64);
if ((sh & 2) == 0) {
tmp2 = load_reg(s, rn);
@ -8773,7 +8773,7 @@ static void disas_arm_insn(DisasContext *s, unsigned int insn) // qq
}
tcg_gen_shri_i64(tcg_ctx, tmp64, tmp64, 32);
tmp = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tmp64);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tmp64);
tcg_temp_free_i64(tcg_ctx, tmp64);
store_reg(s, rn, tmp);
break;
@ -9834,7 +9834,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
tmp64 = gen_muls_i64_i32(s, tmp, tmp2);
tcg_gen_shri_i64(tcg_ctx, tmp64, tmp64, 16);
tmp = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tmp64);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tmp64);
tcg_temp_free_i64(tcg_ctx, tmp64);
if (rs != 15)
{
@ -9858,7 +9858,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
}
tcg_gen_shri_i64(tcg_ctx, tmp64, tmp64, 32);
tmp = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, tmp, tmp64);
tcg_gen_extrl_i64_i32(tcg_ctx, tmp, tmp64);
tcg_temp_free_i64(tcg_ctx, tmp64);
break;
case 7: /* Unsigned sum of absolute differences. */

2
qemu/target-m68k/translate.c
View file

@ -2750,7 +2750,7 @@ DISAS_INSN(from_mac)
if (s->env->macsr & MACSR_FI) {
gen_helper_get_macf(tcg_ctx, rx, tcg_ctx->cpu_env, acc);
} else if ((s->env->macsr & MACSR_OMC) == 0) {
tcg_gen_trunc_i64_i32(tcg_ctx, rx, acc);
tcg_gen_extrl_i64_i32(tcg_ctx, rx, acc);
} else if (s->env->macsr & MACSR_SU) {
gen_helper_get_macs(tcg_ctx, rx, acc);
} else {

4
qemu/target-mips/translate.c
View file

@ -1551,7 +1551,7 @@ static inline void gen_store_srsgpr (DisasContext *s, int from, int to)
static void gen_load_fpr32(DisasContext *s, TCGv_i32 t, int reg)
{
TCGContext *tcg_ctx = s->uc->tcg_ctx;
tcg_gen_trunc_i64_i32(tcg_ctx, t, tcg_ctx->fpu_f64[reg]);
tcg_gen_extrl_i64_i32(tcg_ctx, t, tcg_ctx->fpu_f64[reg]);
}
static void gen_store_fpr32(DisasContext *s, TCGv_i32 t, int reg)
@ -1569,7 +1569,7 @@ static void gen_load_fpr32h(DisasContext *ctx, TCGv_i32 t, int reg)
if (ctx->hflags & MIPS_HFLAG_F64) {
TCGv_i64 t64 = tcg_temp_new_i64(tcg_ctx);
tcg_gen_shri_i64(tcg_ctx, t64, tcg_ctx->fpu_f64[reg], 32);
tcg_gen_trunc_i64_i32(tcg_ctx, t, t64);
tcg_gen_extrl_i64_i32(tcg_ctx, t, t64);
tcg_temp_free_i64(tcg_ctx, t64);
} else {
gen_load_fpr32(ctx, t, reg | 1);

14
qemu/target-sparc/translate.c
View file

@ -140,7 +140,7 @@ static TCGv_i32 gen_load_fpr_F(DisasContext *dc, unsigned int src)
TCGv_i64 t = tcg_temp_new_i64(tcg_ctx);
tcg_gen_shri_i64(tcg_ctx, t, tcg_ctx->cpu_fpr[src / 2], 32);
tcg_gen_trunc_i64_i32(tcg_ctx, ret, t);
tcg_gen_extrl_i64_i32(tcg_ctx, ret, t);
tcg_temp_free_i64(tcg_ctx, t);
return ret;
@ -394,8 +394,8 @@ static TCGv_i32 gen_add32_carry32(DisasContext *dc)
#if TARGET_LONG_BITS == 64
cc_src1_32 = tcg_temp_new_i32(tcg_ctx);
cc_src2_32 = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, cc_src1_32, *(TCGv *)tcg_ctx->cpu_cc_dst);
tcg_gen_trunc_i64_i32(tcg_ctx, cc_src2_32, *(TCGv *)tcg_ctx->cpu_cc_src);
tcg_gen_extrl_i64_i32(tcg_ctx, cc_src1_32, *(TCGv *)tcg_ctx->cpu_cc_dst);
tcg_gen_extrl_i64_i32(tcg_ctx, cc_src2_32, *(TCGv *)tcg_ctx->cpu_cc_src);
#else
cc_src1_32 = *(TCGv *)tcg_ctx->cpu_cc_dst;
cc_src2_32 = *(TCGv *)tcg_ctx->cpu_cc_src;
@ -421,8 +421,8 @@ static TCGv_i32 gen_sub32_carry32(DisasContext *dc)
#if TARGET_LONG_BITS == 64
cc_src1_32 = tcg_temp_new_i32(tcg_ctx);
cc_src2_32 = tcg_temp_new_i32(tcg_ctx);
tcg_gen_trunc_i64_i32(tcg_ctx, cc_src1_32, *(TCGv *)tcg_ctx->cpu_cc_src);
tcg_gen_trunc_i64_i32(tcg_ctx, cc_src2_32, *(TCGv *)tcg_ctx->cpu_cc_src2);
tcg_gen_extrl_i64_i32(tcg_ctx, cc_src1_32, *(TCGv *)tcg_ctx->cpu_cc_src);
tcg_gen_extrl_i64_i32(tcg_ctx, cc_src2_32, *(TCGv *)tcg_ctx->cpu_cc_src2);
#else
cc_src1_32 = *(TCGv *)tcg_ctx->cpu_cc_src;
cc_src2_32 = *(TCGv *)tcg_ctx->cpu_cc_src2;
@ -2390,11 +2390,11 @@ static void gen_fmovs(DisasContext *dc, DisasCompare *cmp, int rd, int rs)
the later. */
c32 = tcg_temp_new_i32(tcg_ctx);
if (cmp->is_bool) {
tcg_gen_trunc_i64_i32(tcg_ctx, c32, cmp->c1);
tcg_gen_extrl_i64_i32(tcg_ctx, c32, cmp->c1);
} else {
TCGv_i64 c64 = tcg_temp_new_i64(tcg_ctx);
tcg_gen_setcond_i64(tcg_ctx, cmp->cond, c64, cmp->c1, cmp->c2);
tcg_gen_trunc_i64_i32(tcg_ctx, c32, c64);
tcg_gen_extrl_i64_i32(tcg_ctx, c32, c64);
tcg_temp_free_i64(tcg_ctx, c64);
}

9
qemu/tcg/tcg-op.h
View file

@ -694,11 +694,6 @@ static inline void tcg_gen_concat32_i64(TCGContext *s, TCGv_i64 ret, TCGv_i64 lo
tcg_gen_deposit_i64(s, ret, lo, hi, 32, 32);
}
static inline void tcg_gen_trunc_i64_i32(TCGContext *s, TCGv_i32 ret, TCGv_i64 arg)
{
tcg_gen_extrl_i64_i32(s, ret, arg);
}
/* QEMU specific operations. */
#ifndef TARGET_LONG_BITS
@ -856,7 +851,7 @@ void check_exit_request(TCGContext *tcg_ctx);
#define tcg_gen_divu_tl tcg_gen_divu_i64
#define tcg_gen_remu_tl tcg_gen_remu_i64
#define tcg_gen_discard_tl tcg_gen_discard_i64
#define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32
#define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
#define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
#define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
#define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
@ -935,7 +930,7 @@ void check_exit_request(TCGContext *tcg_ctx);
#define tcg_gen_remu_tl tcg_gen_remu_i32
#define tcg_gen_discard_tl tcg_gen_discard_i32
#define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
#define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32
#define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
#define tcg_gen_extu_i32_tl tcg_gen_mov_i32
#define tcg_gen_ext_i32_tl tcg_gen_mov_i32
#define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64