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target/arm: Set S and PTW in 64-bit PAR format

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In do_ats_write() we construct a PAR value based on the result
of the translation. A comment says "S2WLK and FSTAGE are always
zero, because we don't implement virtualization".
Since we do in fact now implement virtualization, add the missing
code that sets these bits based on the reported ARMMMUFaultInfo.

(These bits are named PTW and S in ARMv8, so we follow that
convention in the new comments in this patch.)

Backports commit 0f7b791b35f24cb1333f779705a3f6472e6935de from qemu
This commit is contained in:
Peter Maydell 2018-11-11 08:38:21 -05:00 committed by Lioncash
parent 5aa5ebbcc9
commit a445db5c02
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1 changed files with 6 additions and 4 deletions
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10
qemu/target/arm/helper.c
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@ -2062,10 +2062,12 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t value,
par64 |= 1; /* F */ par64 |= 1; /* F */
par64 |= (fsr & 0x3f) << 1; /* FS */ par64 |= (fsr & 0x3f) << 1; /* FS */
/* Note that S2WLK and FSTAGE are always zero, because we don't if (fi.stage2) {
* implement virtualization and therefore there can't be a stage 2 par64 |= (1 << 9); /* S */
* fault. }
*/ if (fi.s1ptw) {
par64 |= (1 << 8); /* PTW */
}
} }
} else { } else {
/* fsr is a DFSR/IFSR value for the short descriptor /* fsr is a DFSR/IFSR value for the short descriptor