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target-mips: enable 10-bit ASIDs in I6400 CPU

Backports commit cdc46fab07a122dfcc8a1054510a68d936ae3440 from qemu
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Leon Alrae 2018-02-25 03:50:50 -05:00 committed by Lioncash
parent 002b392a15
commit a465707a47
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@ -827,7 +827,7 @@ static const mips_def_t mips_defs[] =
(1 << CP0C3_BP) | (1 << CP0C3_BI) | (1 << CP0C3_ULRI) |
(1 << CP0C3_RXI) | (1 << CP0C3_LPA) | (1 << CP0C3_VInt),
MIPS_CONFIG4 | (1U << CP0C4_M) | (3 << CP0C4_IE) |
(0xfc << CP0C4_KScrExist),
(1 << CP0C4_AE) | (0xfc << CP0C4_KScrExist),
MIPS_CONFIG5 | (1 << CP0C5_XNP) | (1 << CP0C5_VP) |
(1 << CP0C5_LLB) | (1 << CP0C5_MRP),
(1 << CP0C5_MSAEn) | (1 << CP0C5_SBRI) |