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target/mips: Fix data type for offset

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Offset can be larger than 16 bit from nanoMIPS,
and immediate field can be larger than 16 bits as well.

Backports commit 72e1f16f18fe62504f8f25d7a3f6813b24b221be from qemu
This commit is contained in:
Yongbok Kim 2018-07-03 01:01:00 -04:00 committed by Lioncash
parent f2d68a4079
commit a63e549673
No known key found for this signature in database
GPG key ID: 4E3C3CC1031BA9C7
1 changed files with 4 additions and 4 deletions
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8
qemu/target/mips/translate.c
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@ -2123,7 +2123,7 @@ OP_ST_ATOMIC(scd,st64,ld64,0x7);
#undef OP_ST_ATOMIC
static void gen_base_offset_addr (DisasContext *ctx, TCGv addr,
int base, int16_t offset)
int base, int offset)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
TCGv *cpu_gpr = tcg_ctx->cpu_gpr;
@ -2153,7 +2153,7 @@ static target_ulong pc_relative_pc (DisasContext *ctx)
/* Load */
static void gen_ld(DisasContext *ctx, uint32_t opc,
int rt, int base, int16_t offset)
int rt, int base, int offset)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
TCGv t0, t1, t2;
@ -2351,7 +2351,7 @@ static void gen_ld(DisasContext *ctx, uint32_t opc,
/* Store */
static void gen_st (DisasContext *ctx, uint32_t opc, int rt,
int base, int16_t offset)
int base, int offset)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
TCGv t0 = tcg_temp_new(tcg_ctx);
@ -2524,7 +2524,7 @@ static void gen_cop1_ldst(DisasContext *ctx, uint32_t op, int rt,
/* Arithmetic with immediate operand */
static void gen_arith_imm(DisasContext *ctx, uint32_t opc,
int rt, int rs, int16_t imm)
int rt, int rs, int imm)
{
TCGContext *tcg_ctx = ctx->uc->tcg_ctx;
TCGv *cpu_gpr = tcg_ctx->cpu_gpr;