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target/arm: Convert VMOV (register) to decodetree
Backports commit 17552b979ebb9848a534c25ebed18a1072710058 from qemu
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ee30962891
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@ -1914,6 +1914,16 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a)
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return true;
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}
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static bool trans_VMOV_reg_sp(DisasContext *s, arg_VMOV_reg_sp *a)
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{
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return do_vfp_2op_sp(s, tcg_gen_mov_i32, a->vd, a->vm);
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}
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static bool trans_VMOV_reg_dp(DisasContext *s, arg_VMOV_reg_dp *a)
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{
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return do_vfp_2op_dp(s, tcg_gen_mov_i64, a->vd, a->vm);
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}
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static bool trans_VABS_sp(DisasContext *s, arg_VABS_sp *a)
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{
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return do_vfp_2op_sp(s, gen_helper_vfp_abss, a->vd, a->vm);
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@ -3190,7 +3190,7 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
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return 1;
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case 15:
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switch (rn) {
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case 1 ... 3:
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case 0 ... 3:
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/* Already handled by decodetree */
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return 1;
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default:
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@ -3203,9 +3203,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
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if (op == 15) {
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/* rn is opcode, encoded as per VFP_SREG_N. */
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switch (rn) {
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case 0x00: /* vmov */
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break;
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case 0x04: /* vcvtb.f64.f16, vcvtb.f32.f16 */
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case 0x05: /* vcvtt.f64.f16, vcvtt.f32.f16 */
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/*
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@ -3378,9 +3375,6 @@ static int disas_vfp_insn(DisasContext *s, uint32_t insn)
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switch (op) {
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case 15: /* extension space */
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switch (rn) {
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case 0: /* cpy */
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/* no-op */
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break;
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case 4: /* vcvtb.f32.f16, vcvtb.f64.f16 */
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{
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TCGv_ptr fpst = get_fpstatus_ptr(s, false);
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@ -157,6 +157,11 @@ VMOV_imm_sp ---- 1110 1.11 imm4h:4 .... 1010 0000 imm4l:4 \
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VMOV_imm_dp ---- 1110 1.11 imm4h:4 .... 1011 0000 imm4l:4 \
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vd=%vd_dp
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VMOV_reg_sp ---- 1110 1.11 0000 .... 1010 01.0 .... \
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vd=%vd_sp vm=%vm_sp
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VMOV_reg_dp ---- 1110 1.11 0000 .... 1011 01.0 .... \
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vd=%vd_dp vm=%vm_dp
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VABS_sp ---- 1110 1.11 0000 .... 1010 11.0 .... \
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vd=%vd_sp vm=%vm_sp
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VABS_dp ---- 1110 1.11 0000 .... 1011 11.0 .... \
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