tcg: Add generic vector ops for multiplication

Backports commit 3774030a3e523689df24a7ed22854ce7a06b0116 from qemu

qemu/aarch64.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_aarch64
 #define helper_gvec_ltu64 helper_gvec_ltu64_aarch64
 #define helper_gvec_mov helper_gvec_mov_aarch64
+#define helper_gvec_mul8 helper_gvec_mul8_aarch64
+#define helper_gvec_mul16 helper_gvec_mul16_aarch64
+#define helper_gvec_mul32 helper_gvec_mul32_aarch64
+#define helper_gvec_mul64 helper_gvec_mul64_aarch64
 #define helper_gvec_ne8 helper_gvec_ne8_aarch64
 #define helper_gvec_ne16 helper_gvec_ne16_aarch64
 #define helper_gvec_ne32 helper_gvec_ne32_aarch64
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_aarch64
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_aarch64
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_aarch64
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_aarch64
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_aarch64
 #define tcg_gen_gvec_not tcg_gen_gvec_not_aarch64
 #define tcg_gen_gvec_or tcg_gen_gvec_or_aarch64
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_aarch64
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_aarch64
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_aarch64
+#define tcg_gen_mul_vec tcg_gen_mul_vec_aarch64
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_aarch64
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_aarch64
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_aarch64

qemu/aarch64eb.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_aarch64eb
 #define helper_gvec_ltu64 helper_gvec_ltu64_aarch64eb
 #define helper_gvec_mov helper_gvec_mov_aarch64eb
+#define helper_gvec_mul8 helper_gvec_mul8_aarch64eb
+#define helper_gvec_mul16 helper_gvec_mul16_aarch64eb
+#define helper_gvec_mul32 helper_gvec_mul32_aarch64eb
+#define helper_gvec_mul64 helper_gvec_mul64_aarch64eb
 #define helper_gvec_ne8 helper_gvec_ne8_aarch64eb
 #define helper_gvec_ne16 helper_gvec_ne16_aarch64eb
 #define helper_gvec_ne32 helper_gvec_ne32_aarch64eb
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_aarch64eb
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_aarch64eb
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_aarch64eb
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_aarch64eb
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_aarch64eb
 #define tcg_gen_gvec_not tcg_gen_gvec_not_aarch64eb
 #define tcg_gen_gvec_or tcg_gen_gvec_or_aarch64eb
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_aarch64eb
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_aarch64eb
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_aarch64eb
+#define tcg_gen_mul_vec tcg_gen_mul_vec_aarch64eb
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_aarch64eb
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_aarch64eb
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_aarch64eb

qemu/arm.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_arm
 #define helper_gvec_ltu64 helper_gvec_ltu64_arm
 #define helper_gvec_mov helper_gvec_mov_arm
+#define helper_gvec_mul8 helper_gvec_mul8_arm
+#define helper_gvec_mul16 helper_gvec_mul16_arm
+#define helper_gvec_mul32 helper_gvec_mul32_arm
+#define helper_gvec_mul64 helper_gvec_mul64_arm
 #define helper_gvec_ne8 helper_gvec_ne8_arm
 #define helper_gvec_ne16 helper_gvec_ne16_arm
 #define helper_gvec_ne32 helper_gvec_ne32_arm
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_arm
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_arm
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_arm
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_arm
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_arm
 #define tcg_gen_gvec_not tcg_gen_gvec_not_arm
 #define tcg_gen_gvec_or tcg_gen_gvec_or_arm
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_arm
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_arm
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_arm
+#define tcg_gen_mul_vec tcg_gen_mul_vec_arm
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_arm
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_arm
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_arm

qemu/armeb.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_armeb
 #define helper_gvec_ltu64 helper_gvec_ltu64_armeb
 #define helper_gvec_mov helper_gvec_mov_armeb
+#define helper_gvec_mul8 helper_gvec_mul8_armeb
+#define helper_gvec_mul16 helper_gvec_mul16_armeb
+#define helper_gvec_mul32 helper_gvec_mul32_armeb
+#define helper_gvec_mul64 helper_gvec_mul64_armeb
 #define helper_gvec_ne8 helper_gvec_ne8_armeb
 #define helper_gvec_ne16 helper_gvec_ne16_armeb
 #define helper_gvec_ne32 helper_gvec_ne32_armeb
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_armeb
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_armeb
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_armeb
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_armeb
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_armeb
 #define tcg_gen_gvec_not tcg_gen_gvec_not_armeb
 #define tcg_gen_gvec_or tcg_gen_gvec_or_armeb
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_armeb
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_armeb
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_armeb
+#define tcg_gen_mul_vec tcg_gen_mul_vec_armeb
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_armeb
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_armeb
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_armeb

qemu/header_gen.py

@@ -1646,6 +1646,10 @@ symbols = (
     'helper_gvec_ltu32',
     'helper_gvec_ltu64',
     'helper_gvec_mov',
+    'helper_gvec_mul8',
+    'helper_gvec_mul16',
+    'helper_gvec_mul32',
+    'helper_gvec_mul64',
     'helper_gvec_ne8',
     'helper_gvec_ne16',
     'helper_gvec_ne32',
@@ -3179,6 +3183,7 @@ symbols = (
     'tcg_gen_gvec_dup_i64',
     'tcg_gen_gvec_dup_mem',
     'tcg_gen_gvec_mov',
+    'tcg_gen_gvec_mul',
     'tcg_gen_gvec_neg',
     'tcg_gen_gvec_not',
     'tcg_gen_gvec_or',
@@ -3211,6 +3216,7 @@ symbols = (
     'tcg_gen_movi_i64',
     'tcg_gen_mul_i32',
     'tcg_gen_mul_i64',
+    'tcg_gen_mul_vec',
     'tcg_gen_muli_i32',
     'tcg_gen_muli_i64',
     'tcg_gen_muls2_i32',

qemu/m68k.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_m68k
 #define helper_gvec_ltu64 helper_gvec_ltu64_m68k
 #define helper_gvec_mov helper_gvec_mov_m68k
+#define helper_gvec_mul8 helper_gvec_mul8_m68k
+#define helper_gvec_mul16 helper_gvec_mul16_m68k
+#define helper_gvec_mul32 helper_gvec_mul32_m68k
+#define helper_gvec_mul64 helper_gvec_mul64_m68k
 #define helper_gvec_ne8 helper_gvec_ne8_m68k
 #define helper_gvec_ne16 helper_gvec_ne16_m68k
 #define helper_gvec_ne32 helper_gvec_ne32_m68k
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_m68k
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_m68k
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_m68k
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_m68k
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_m68k
 #define tcg_gen_gvec_not tcg_gen_gvec_not_m68k
 #define tcg_gen_gvec_or tcg_gen_gvec_or_m68k
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_m68k
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_m68k
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_m68k
+#define tcg_gen_mul_vec tcg_gen_mul_vec_m68k
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_m68k
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_m68k
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_m68k

qemu/mips.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_mips
 #define helper_gvec_ltu64 helper_gvec_ltu64_mips
 #define helper_gvec_mov helper_gvec_mov_mips
+#define helper_gvec_mul8 helper_gvec_mul8_mips
+#define helper_gvec_mul16 helper_gvec_mul16_mips
+#define helper_gvec_mul32 helper_gvec_mul32_mips
+#define helper_gvec_mul64 helper_gvec_mul64_mips
 #define helper_gvec_ne8 helper_gvec_ne8_mips
 #define helper_gvec_ne16 helper_gvec_ne16_mips
 #define helper_gvec_ne32 helper_gvec_ne32_mips
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips
 #define tcg_gen_gvec_not tcg_gen_gvec_not_mips
 #define tcg_gen_gvec_or tcg_gen_gvec_or_mips
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_mips
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_mips
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_mips
+#define tcg_gen_mul_vec tcg_gen_mul_vec_mips
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_mips
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_mips
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_mips

qemu/mips64.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_mips64
 #define helper_gvec_ltu64 helper_gvec_ltu64_mips64
 #define helper_gvec_mov helper_gvec_mov_mips64
+#define helper_gvec_mul8 helper_gvec_mul8_mips64
+#define helper_gvec_mul16 helper_gvec_mul16_mips64
+#define helper_gvec_mul32 helper_gvec_mul32_mips64
+#define helper_gvec_mul64 helper_gvec_mul64_mips64
 #define helper_gvec_ne8 helper_gvec_ne8_mips64
 #define helper_gvec_ne16 helper_gvec_ne16_mips64
 #define helper_gvec_ne32 helper_gvec_ne32_mips64
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips64
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips64
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips64
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips64
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips64
 #define tcg_gen_gvec_not tcg_gen_gvec_not_mips64
 #define tcg_gen_gvec_or tcg_gen_gvec_or_mips64
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_mips64
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_mips64
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_mips64
+#define tcg_gen_mul_vec tcg_gen_mul_vec_mips64
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_mips64
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_mips64
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_mips64

qemu/mips64el.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_mips64el
 #define helper_gvec_ltu64 helper_gvec_ltu64_mips64el
 #define helper_gvec_mov helper_gvec_mov_mips64el
+#define helper_gvec_mul8 helper_gvec_mul8_mips64el
+#define helper_gvec_mul16 helper_gvec_mul16_mips64el
+#define helper_gvec_mul32 helper_gvec_mul32_mips64el
+#define helper_gvec_mul64 helper_gvec_mul64_mips64el
 #define helper_gvec_ne8 helper_gvec_ne8_mips64el
 #define helper_gvec_ne16 helper_gvec_ne16_mips64el
 #define helper_gvec_ne32 helper_gvec_ne32_mips64el
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mips64el
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mips64el
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_mips64el
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mips64el
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_mips64el
 #define tcg_gen_gvec_not tcg_gen_gvec_not_mips64el
 #define tcg_gen_gvec_or tcg_gen_gvec_or_mips64el
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_mips64el
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_mips64el
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_mips64el
+#define tcg_gen_mul_vec tcg_gen_mul_vec_mips64el
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_mips64el
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_mips64el
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_mips64el

qemu/mipsel.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_mipsel
 #define helper_gvec_ltu64 helper_gvec_ltu64_mipsel
 #define helper_gvec_mov helper_gvec_mov_mipsel
+#define helper_gvec_mul8 helper_gvec_mul8_mipsel
+#define helper_gvec_mul16 helper_gvec_mul16_mipsel
+#define helper_gvec_mul32 helper_gvec_mul32_mipsel
+#define helper_gvec_mul64 helper_gvec_mul64_mipsel
 #define helper_gvec_ne8 helper_gvec_ne8_mipsel
 #define helper_gvec_ne16 helper_gvec_ne16_mipsel
 #define helper_gvec_ne32 helper_gvec_ne32_mipsel
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_mipsel
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_mipsel
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_mipsel
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_mipsel
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_mipsel
 #define tcg_gen_gvec_not tcg_gen_gvec_not_mipsel
 #define tcg_gen_gvec_or tcg_gen_gvec_or_mipsel
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_mipsel
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_mipsel
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_mipsel
+#define tcg_gen_mul_vec tcg_gen_mul_vec_mipsel
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_mipsel
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_mipsel
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_mipsel

qemu/powerpc.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_powerpc
 #define helper_gvec_ltu64 helper_gvec_ltu64_powerpc
 #define helper_gvec_mov helper_gvec_mov_powerpc
+#define helper_gvec_mul8 helper_gvec_mul8_powerpc
+#define helper_gvec_mul16 helper_gvec_mul16_powerpc
+#define helper_gvec_mul32 helper_gvec_mul32_powerpc
+#define helper_gvec_mul64 helper_gvec_mul64_powerpc
 #define helper_gvec_ne8 helper_gvec_ne8_powerpc
 #define helper_gvec_ne16 helper_gvec_ne16_powerpc
 #define helper_gvec_ne32 helper_gvec_ne32_powerpc
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_powerpc
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_powerpc
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_powerpc
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_powerpc
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_powerpc
 #define tcg_gen_gvec_not tcg_gen_gvec_not_powerpc
 #define tcg_gen_gvec_or tcg_gen_gvec_or_powerpc
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_powerpc
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_powerpc
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_powerpc
+#define tcg_gen_mul_vec tcg_gen_mul_vec_powerpc
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_powerpc
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_powerpc
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_powerpc

qemu/sparc.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_sparc
 #define helper_gvec_ltu64 helper_gvec_ltu64_sparc
 #define helper_gvec_mov helper_gvec_mov_sparc
+#define helper_gvec_mul8 helper_gvec_mul8_sparc
+#define helper_gvec_mul16 helper_gvec_mul16_sparc
+#define helper_gvec_mul32 helper_gvec_mul32_sparc
+#define helper_gvec_mul64 helper_gvec_mul64_sparc
 #define helper_gvec_ne8 helper_gvec_ne8_sparc
 #define helper_gvec_ne16 helper_gvec_ne16_sparc
 #define helper_gvec_ne32 helper_gvec_ne32_sparc
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_sparc
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_sparc
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_sparc
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_sparc
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_sparc
 #define tcg_gen_gvec_not tcg_gen_gvec_not_sparc
 #define tcg_gen_gvec_or tcg_gen_gvec_or_sparc
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_sparc
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_sparc
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_sparc
+#define tcg_gen_mul_vec tcg_gen_mul_vec_sparc
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_sparc
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_sparc
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_sparc

qemu/sparc64.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_sparc64
 #define helper_gvec_ltu64 helper_gvec_ltu64_sparc64
 #define helper_gvec_mov helper_gvec_mov_sparc64
+#define helper_gvec_mul8 helper_gvec_mul8_sparc64
+#define helper_gvec_mul16 helper_gvec_mul16_sparc64
+#define helper_gvec_mul32 helper_gvec_mul32_sparc64
+#define helper_gvec_mul64 helper_gvec_mul64_sparc64
 #define helper_gvec_ne8 helper_gvec_ne8_sparc64
 #define helper_gvec_ne16 helper_gvec_ne16_sparc64
 #define helper_gvec_ne32 helper_gvec_ne32_sparc64
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_sparc64
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_sparc64
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_sparc64
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_sparc64
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_sparc64
 #define tcg_gen_gvec_not tcg_gen_gvec_not_sparc64
 #define tcg_gen_gvec_or tcg_gen_gvec_or_sparc64
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_sparc64
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_sparc64
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_sparc64
+#define tcg_gen_mul_vec tcg_gen_mul_vec_sparc64
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_sparc64
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_sparc64
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_sparc64

qemu/tcg-runtime-gvec.c

@@ -166,6 +166,50 @@ void HELPER(gvec_sub64)(void *d, void *a, void *b, uint32_t desc)
     clear_high(d, oprsz, desc);
 }
 
+void HELPER(gvec_mul8)(void *d, void *a, void *b, uint32_t desc)
+{
+    intptr_t oprsz = simd_oprsz(desc);
+    intptr_t i;
+
+    for (i = 0; i < oprsz; i += sizeof(vec8)) {
+        *(vec8 *)(d + i) = *(vec8 *)(a + i) * *(vec8 *)(b + i);
+    }
+    clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_mul16)(void *d, void *a, void *b, uint32_t desc)
+{
+    intptr_t oprsz = simd_oprsz(desc);
+    intptr_t i;
+
+    for (i = 0; i < oprsz; i += sizeof(vec16)) {
+        *(vec16 *)(d + i) = *(vec16 *)(a + i) * *(vec16 *)(b + i);
+    }
+    clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_mul32)(void *d, void *a, void *b, uint32_t desc)
+{
+    intptr_t oprsz = simd_oprsz(desc);
+    intptr_t i;
+
+    for (i = 0; i < oprsz; i += sizeof(vec32)) {
+        *(vec32 *)(d + i) = *(vec32 *)(a + i) * *(vec32 *)(b + i);
+    }
+    clear_high(d, oprsz, desc);
+}
+
+void HELPER(gvec_mul64)(void *d, void *a, void *b, uint32_t desc)
+{
+    intptr_t oprsz = simd_oprsz(desc);
+    intptr_t i;
+
+    for (i = 0; i < oprsz; i += sizeof(vec64)) {
+        *(vec64 *)(d + i) = *(vec64 *)(a + i) * *(vec64 *)(b + i);
+    }
+    clear_high(d, oprsz, desc);
+}
+
 void HELPER(gvec_neg8)(void *d, void *a, uint32_t desc)
 {
     intptr_t oprsz = simd_oprsz(desc);

qemu/tcg/README

@@ -533,6 +533,10 @@ E.g. VECL=1 -> 64 << 1 -> v128, and VECE=2 -> 1 << 2 -> i32.
 
   Similarly, v0 = v1 - v2.
 
+* mul_vec   v0, v1, v2
+
+  Similarly, v0 = v1 * v2.
+
 * neg_vec   v0, v1
 
   Similarly, v0 = -v1.

qemu/tcg/tcg-op-gvec.c

@@ -1281,6 +1281,35 @@ void tcg_gen_gvec_sub(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs
     tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
 }
 
+void tcg_gen_gvec_mul(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
+                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz)
+{
+    static const GVecGen3 g[4] = {
+        { .fniv = tcg_gen_mul_vec,
+          .fno = gen_helper_gvec_mul8,
+          .opc = INDEX_op_mul_vec,
+          .vece = MO_8 },
+        { .fniv = tcg_gen_mul_vec,
+          .fno = gen_helper_gvec_mul16,
+          .opc = INDEX_op_mul_vec,
+          .vece = MO_16 },
+        { .fni4 = tcg_gen_mul_i32,
+          .fniv = tcg_gen_mul_vec,
+          .fno = gen_helper_gvec_mul32,
+          .opc = INDEX_op_mul_vec,
+          .vece = MO_32 },
+        { .fni8 = tcg_gen_mul_i64,
+          .fniv = tcg_gen_mul_vec,
+          .fno = gen_helper_gvec_mul64,
+          .opc = INDEX_op_mul_vec,
+          .prefer_i64 = TCG_TARGET_REG_BITS == 64,
+          .vece = MO_64 },
+    };
+
+    tcg_debug_assert(vece <= MO_64);
+    tcg_gen_gvec_3(s, dofs, aofs, bofs, oprsz, maxsz, &g[vece]);
+}
+
 /* Perform a vector negation using normal negation and a mask.
    Compare gen_subv_mask above.  */
 static void gen_negv_mask(TCGContext *s, TCGv_i64 d, TCGv_i64 b, TCGv_i64 m)

qemu/tcg/tcg-op-gvec.h

@@ -176,6 +176,8 @@ void tcg_gen_gvec_add(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs,
                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 void tcg_gen_gvec_sub(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs,
                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+void tcg_gen_gvec_mul(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs,
+                      uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
 
 void tcg_gen_gvec_and(TCGContext *, unsigned vece, uint32_t dofs, uint32_t aofs,
                       uint32_t bofs, uint32_t oprsz, uint32_t maxsz);

qemu/tcg/tcg-op-vec.c

@@ -365,3 +365,25 @@ void tcg_gen_cmp_vec(TCGContext *s, TCGCond cond, unsigned vece,
         tcg_expand_vec_op(s, INDEX_op_cmp_vec, type, vece, ri, ai, bi, cond);
     }
 }
+
+void tcg_gen_mul_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b)
+{
+    TCGTemp *rt = tcgv_vec_temp(s, r);
+    TCGTemp *at = tcgv_vec_temp(s, a);
+    TCGTemp *bt = tcgv_vec_temp(s, b);
+    TCGArg ri = temp_arg(rt);
+    TCGArg ai = temp_arg(at);
+    TCGArg bi = temp_arg(bt);
+    TCGType type = rt->base_type;
+    int can;
+
+    tcg_debug_assert(at->base_type == type);
+    tcg_debug_assert(bt->base_type == type);
+    can = tcg_can_emit_vec_op(INDEX_op_mul_vec, type, vece);
+    if (can > 0) {
+        vec_gen_3(s, INDEX_op_mul_vec, type, vece, ri, ai, bi);
+    } else {
+        tcg_debug_assert(can < 0);
+        tcg_expand_vec_op(s, INDEX_op_mul_vec, type, vece, ri, ai, bi);
+    }
+}

qemu/tcg/tcg-op.h

@@ -925,6 +925,7 @@ void tcg_gen_dup64i_vec(TCGContext *, TCGv_vec, uint64_t);
 void tcg_gen_dupi_vec(TCGContext *, unsigned vece, TCGv_vec, uint64_t);
 void tcg_gen_add_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 void tcg_gen_sub_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
+void tcg_gen_mul_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 void tcg_gen_and_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 void tcg_gen_or_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 void tcg_gen_xor_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);

qemu/tcg/tcg-opc.h

@@ -223,6 +223,7 @@ DEF(st_vec, 0, 2, 1, IMPLVEC)
 
 DEF(add_vec, 1, 2, 0, IMPLVEC)
 DEF(sub_vec, 1, 2, 0, IMPLVEC)
+DEF(mul_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_mul_vec))
 DEF(neg_vec, 1, 1, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_neg_vec))
 
 DEF(and_vec, 1, 2, 0, IMPLVEC)

qemu/tcg/tcg-runtime.h

@@ -153,6 +153,11 @@ DEF_HELPER_FLAGS_4(gvec_sub16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
 DEF_HELPER_FLAGS_4(gvec_sub32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
 DEF_HELPER_FLAGS_4(gvec_sub64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
 
+DEF_HELPER_FLAGS_4(gvec_mul8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_mul16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_mul32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(gvec_mul64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+
 DEF_HELPER_FLAGS_3(gvec_neg8, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
 DEF_HELPER_FLAGS_3(gvec_neg16, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
 DEF_HELPER_FLAGS_3(gvec_neg32, TCG_CALL_NO_RWG, void, ptr, ptr, i32)

qemu/tcg/tcg.c

@@ -1060,6 +1060,8 @@ bool tcg_op_supported(TCGOpcode op)
         return have_vec && TCG_TARGET_HAS_andc_vec;
     case INDEX_op_orc_vec:
         return have_vec && TCG_TARGET_HAS_orc_vec;
+    case INDEX_op_mul_vec:
+        return have_vec && TCG_TARGET_HAS_mul_vec;
     case INDEX_op_shli_vec:
     case INDEX_op_shri_vec:
     case INDEX_op_sari_vec:

qemu/tcg/tcg.h

@@ -184,6 +184,7 @@ typedef uint64_t TCGRegSet;
 #define TCG_TARGET_HAS_shi_vec          0
 #define TCG_TARGET_HAS_shs_vec          0
 #define TCG_TARGET_HAS_shv_vec          0
+#define TCG_TARGET_HAS_mul_vec          0
 #else
 #define TCG_TARGET_MAYBE_vec            1
 #endif
@@ -1097,7 +1098,7 @@ static inline TCGv_i64 tcg_temp_local_new_i64(TCGContext *s)
 }
 
 // UNICORN: Added
-#define TCG_OP_DEFS_TABLE_SIZE 161
+#define TCG_OP_DEFS_TABLE_SIZE 162
 extern const TCGOpDef tcg_op_defs_org[TCG_OP_DEFS_TABLE_SIZE];
 
 typedef struct TCGTargetOpDef {

qemu/x86_64.h

@@ -1640,6 +1640,10 @@
 #define helper_gvec_ltu32 helper_gvec_ltu32_x86_64
 #define helper_gvec_ltu64 helper_gvec_ltu64_x86_64
 #define helper_gvec_mov helper_gvec_mov_x86_64
+#define helper_gvec_mul8 helper_gvec_mul8_x86_64
+#define helper_gvec_mul16 helper_gvec_mul16_x86_64
+#define helper_gvec_mul32 helper_gvec_mul32_x86_64
+#define helper_gvec_mul64 helper_gvec_mul64_x86_64
 #define helper_gvec_ne8 helper_gvec_ne8_x86_64
 #define helper_gvec_ne16 helper_gvec_ne16_x86_64
 #define helper_gvec_ne32 helper_gvec_ne32_x86_64
@@ -3173,6 +3177,7 @@
 #define tcg_gen_gvec_dup_i64 tcg_gen_gvec_dup_i64_x86_64
 #define tcg_gen_gvec_dup_mem tcg_gen_gvec_dup_mem_x86_64
 #define tcg_gen_gvec_mov tcg_gen_gvec_mov_x86_64
+#define tcg_gen_gvec_mul tcg_gen_gvec_mul_x86_64
 #define tcg_gen_gvec_neg tcg_gen_gvec_neg_x86_64
 #define tcg_gen_gvec_not tcg_gen_gvec_not_x86_64
 #define tcg_gen_gvec_or tcg_gen_gvec_or_x86_64
@@ -3205,6 +3210,7 @@
 #define tcg_gen_movi_i64 tcg_gen_movi_i64_x86_64
 #define tcg_gen_mul_i32 tcg_gen_mul_i32_x86_64
 #define tcg_gen_mul_i64 tcg_gen_mul_i64_x86_64
+#define tcg_gen_mul_vec tcg_gen_mul_vec_x86_64
 #define tcg_gen_muli_i32 tcg_gen_muli_i32_x86_64
 #define tcg_gen_muli_i64 tcg_gen_muli_i64_x86_64
 #define tcg_gen_muls2_i32 tcg_gen_muls2_i32_x86_64