mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-12-23 00:35:34 +00:00
tcg: Add generic vector ops for comparisons
Backports commit 212be173f01e85e6589fd76676827953a84a732b from qemu
This commit is contained in:
Richard Henderson
Lioncash
parent
577ee114c3
commit
f9c4930ecd
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@ -1619,7 +1619,31 @@
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#define helper_gvec_dup16 helper_gvec_dup16_aarch64
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#define helper_gvec_dup32 helper_gvec_dup32_aarch64
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#define helper_gvec_dup64 helper_gvec_dup64_aarch64
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#define helper_gvec_eq8 helper_gvec_eq8_aarch64
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#define helper_gvec_eq16 helper_gvec_eq16_aarch64
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#define helper_gvec_eq32 helper_gvec_eq32_aarch64
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#define helper_gvec_eq64 helper_gvec_eq64_aarch64
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#define helper_gvec_le8 helper_gvec_le8_aarch64
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#define helper_gvec_le16 helper_gvec_le16_aarch64
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#define helper_gvec_le32 helper_gvec_le32_aarch64
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#define helper_gvec_le64 helper_gvec_le64_aarch64
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#define helper_gvec_leu8 helper_gvec_leu8_aarch64
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#define helper_gvec_leu16 helper_gvec_leu16_aarch64
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#define helper_gvec_leu32 helper_gvec_leu32_aarch64
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#define helper_gvec_leu64 helper_gvec_leu64_aarch64
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#define helper_gvec_lt8 helper_gvec_lt8_aarch64
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#define helper_gvec_lt16 helper_gvec_lt16_aarch64
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#define helper_gvec_lt32 helper_gvec_lt32_aarch64
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#define helper_gvec_lt64 helper_gvec_lt64_aarch64
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#define helper_gvec_ltu8 helper_gvec_ltu8_aarch64
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#define helper_gvec_ltu16 helper_gvec_ltu16_aarch64
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#define helper_gvec_ltu32 helper_gvec_ltu32_aarch64
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#define helper_gvec_ltu64 helper_gvec_ltu64_aarch64
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#define helper_gvec_mov helper_gvec_mov_aarch64
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#define helper_gvec_ne8 helper_gvec_ne8_aarch64
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#define helper_gvec_ne16 helper_gvec_ne16_aarch64
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#define helper_gvec_ne32 helper_gvec_ne32_aarch64
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#define helper_gvec_ne64 helper_gvec_ne64_aarch64
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#define helper_gvec_neg8 helper_gvec_neg8_aarch64
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#define helper_gvec_neg16 helper_gvec_neg16_aarch64
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#define helper_gvec_neg32 helper_gvec_neg32_aarch64
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@ -3079,6 +3103,7 @@
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#define tcg_gen_clz_i64 tcg_gen_clz_i64_aarch64
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#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_aarch64
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#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_aarch64
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#define tcg_gen_cmp_vec tcg_gen_cmp_vec_aarch64
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#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_aarch64
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#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_aarch64
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#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_aarch64
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@ -3139,6 +3164,7 @@
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#define tcg_gen_gvec_add tcg_gen_gvec_add_aarch64
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#define tcg_gen_gvec_and tcg_gen_gvec_and_aarch64
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#define tcg_gen_gvec_andc tcg_gen_gvec_andc_aarch64
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#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_aarch64
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#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_aarch64
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#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_aarch64
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#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_aarch64
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@ -1619,7 +1619,31 @@
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#define helper_gvec_dup16 helper_gvec_dup16_aarch64eb
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#define helper_gvec_dup32 helper_gvec_dup32_aarch64eb
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#define helper_gvec_dup64 helper_gvec_dup64_aarch64eb
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#define helper_gvec_eq8 helper_gvec_eq8_aarch64eb
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#define helper_gvec_eq16 helper_gvec_eq16_aarch64eb
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#define helper_gvec_eq32 helper_gvec_eq32_aarch64eb
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#define helper_gvec_eq64 helper_gvec_eq64_aarch64eb
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#define helper_gvec_le8 helper_gvec_le8_aarch64eb
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#define helper_gvec_le16 helper_gvec_le16_aarch64eb
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#define helper_gvec_le32 helper_gvec_le32_aarch64eb
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#define helper_gvec_le64 helper_gvec_le64_aarch64eb
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#define helper_gvec_leu8 helper_gvec_leu8_aarch64eb
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#define helper_gvec_leu16 helper_gvec_leu16_aarch64eb
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#define helper_gvec_leu32 helper_gvec_leu32_aarch64eb
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#define helper_gvec_leu64 helper_gvec_leu64_aarch64eb
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#define helper_gvec_lt8 helper_gvec_lt8_aarch64eb
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#define helper_gvec_lt16 helper_gvec_lt16_aarch64eb
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#define helper_gvec_lt32 helper_gvec_lt32_aarch64eb
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#define helper_gvec_lt64 helper_gvec_lt64_aarch64eb
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#define helper_gvec_ltu8 helper_gvec_ltu8_aarch64eb
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#define helper_gvec_ltu16 helper_gvec_ltu16_aarch64eb
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#define helper_gvec_ltu32 helper_gvec_ltu32_aarch64eb
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#define helper_gvec_ltu64 helper_gvec_ltu64_aarch64eb
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#define helper_gvec_mov helper_gvec_mov_aarch64eb
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#define helper_gvec_ne8 helper_gvec_ne8_aarch64eb
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#define helper_gvec_ne16 helper_gvec_ne16_aarch64eb
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#define helper_gvec_ne32 helper_gvec_ne32_aarch64eb
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#define helper_gvec_ne64 helper_gvec_ne64_aarch64eb
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#define helper_gvec_neg8 helper_gvec_neg8_aarch64eb
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#define helper_gvec_neg16 helper_gvec_neg16_aarch64eb
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#define helper_gvec_neg32 helper_gvec_neg32_aarch64eb
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@ -3079,6 +3103,7 @@
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#define tcg_gen_clz_i64 tcg_gen_clz_i64_aarch64eb
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#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_aarch64eb
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#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_aarch64eb
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#define tcg_gen_cmp_vec tcg_gen_cmp_vec_aarch64eb
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#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_aarch64eb
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#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_aarch64eb
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#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_aarch64eb
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@ -3139,6 +3164,7 @@
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#define tcg_gen_gvec_add tcg_gen_gvec_add_aarch64eb
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#define tcg_gen_gvec_and tcg_gen_gvec_and_aarch64eb
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#define tcg_gen_gvec_andc tcg_gen_gvec_andc_aarch64eb
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#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_aarch64eb
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#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_aarch64eb
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#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_aarch64eb
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#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_aarch64eb
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26
qemu/arm.h
26
qemu/arm.h
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@ -1619,7 +1619,31 @@
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#define helper_gvec_dup16 helper_gvec_dup16_arm
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#define helper_gvec_dup32 helper_gvec_dup32_arm
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#define helper_gvec_dup64 helper_gvec_dup64_arm
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#define helper_gvec_eq8 helper_gvec_eq8_arm
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#define helper_gvec_eq16 helper_gvec_eq16_arm
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#define helper_gvec_eq32 helper_gvec_eq32_arm
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#define helper_gvec_eq64 helper_gvec_eq64_arm
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#define helper_gvec_le8 helper_gvec_le8_arm
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#define helper_gvec_le16 helper_gvec_le16_arm
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#define helper_gvec_le32 helper_gvec_le32_arm
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#define helper_gvec_le64 helper_gvec_le64_arm
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#define helper_gvec_leu8 helper_gvec_leu8_arm
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#define helper_gvec_leu16 helper_gvec_leu16_arm
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#define helper_gvec_leu32 helper_gvec_leu32_arm
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#define helper_gvec_leu64 helper_gvec_leu64_arm
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#define helper_gvec_lt8 helper_gvec_lt8_arm
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#define helper_gvec_lt16 helper_gvec_lt16_arm
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#define helper_gvec_lt32 helper_gvec_lt32_arm
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#define helper_gvec_lt64 helper_gvec_lt64_arm
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#define helper_gvec_ltu8 helper_gvec_ltu8_arm
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#define helper_gvec_ltu16 helper_gvec_ltu16_arm
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#define helper_gvec_ltu32 helper_gvec_ltu32_arm
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#define helper_gvec_ltu64 helper_gvec_ltu64_arm
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#define helper_gvec_mov helper_gvec_mov_arm
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#define helper_gvec_ne8 helper_gvec_ne8_arm
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#define helper_gvec_ne16 helper_gvec_ne16_arm
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#define helper_gvec_ne32 helper_gvec_ne32_arm
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#define helper_gvec_ne64 helper_gvec_ne64_arm
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#define helper_gvec_neg8 helper_gvec_neg8_arm
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#define helper_gvec_neg16 helper_gvec_neg16_arm
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#define helper_gvec_neg32 helper_gvec_neg32_arm
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@ -3079,6 +3103,7 @@
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#define tcg_gen_clz_i64 tcg_gen_clz_i64_arm
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#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_arm
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#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_arm
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#define tcg_gen_cmp_vec tcg_gen_cmp_vec_arm
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#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_arm
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#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_arm
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#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_arm
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@ -3139,6 +3164,7 @@
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#define tcg_gen_gvec_add tcg_gen_gvec_add_arm
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#define tcg_gen_gvec_and tcg_gen_gvec_and_arm
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#define tcg_gen_gvec_andc tcg_gen_gvec_andc_arm
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#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_arm
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#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_arm
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#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_arm
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#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_arm
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26
qemu/armeb.h
26
qemu/armeb.h
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@ -1619,7 +1619,31 @@
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#define helper_gvec_dup16 helper_gvec_dup16_armeb
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#define helper_gvec_dup32 helper_gvec_dup32_armeb
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#define helper_gvec_dup64 helper_gvec_dup64_armeb
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#define helper_gvec_eq8 helper_gvec_eq8_armeb
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#define helper_gvec_eq16 helper_gvec_eq16_armeb
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#define helper_gvec_eq32 helper_gvec_eq32_armeb
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#define helper_gvec_eq64 helper_gvec_eq64_armeb
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#define helper_gvec_le8 helper_gvec_le8_armeb
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#define helper_gvec_le16 helper_gvec_le16_armeb
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#define helper_gvec_le32 helper_gvec_le32_armeb
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#define helper_gvec_le64 helper_gvec_le64_armeb
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#define helper_gvec_leu8 helper_gvec_leu8_armeb
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#define helper_gvec_leu16 helper_gvec_leu16_armeb
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#define helper_gvec_leu32 helper_gvec_leu32_armeb
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#define helper_gvec_leu64 helper_gvec_leu64_armeb
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#define helper_gvec_lt8 helper_gvec_lt8_armeb
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#define helper_gvec_lt16 helper_gvec_lt16_armeb
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#define helper_gvec_lt32 helper_gvec_lt32_armeb
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#define helper_gvec_lt64 helper_gvec_lt64_armeb
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#define helper_gvec_ltu8 helper_gvec_ltu8_armeb
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#define helper_gvec_ltu16 helper_gvec_ltu16_armeb
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#define helper_gvec_ltu32 helper_gvec_ltu32_armeb
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#define helper_gvec_ltu64 helper_gvec_ltu64_armeb
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#define helper_gvec_mov helper_gvec_mov_armeb
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#define helper_gvec_ne8 helper_gvec_ne8_armeb
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#define helper_gvec_ne16 helper_gvec_ne16_armeb
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#define helper_gvec_ne32 helper_gvec_ne32_armeb
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#define helper_gvec_ne64 helper_gvec_ne64_armeb
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#define helper_gvec_neg8 helper_gvec_neg8_armeb
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#define helper_gvec_neg16 helper_gvec_neg16_armeb
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#define helper_gvec_neg32 helper_gvec_neg32_armeb
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@ -3079,6 +3103,7 @@
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#define tcg_gen_clz_i64 tcg_gen_clz_i64_armeb
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#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_armeb
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#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_armeb
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#define tcg_gen_cmp_vec tcg_gen_cmp_vec_armeb
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#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_armeb
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#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_armeb
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#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_armeb
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@ -3139,6 +3164,7 @@
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#define tcg_gen_gvec_add tcg_gen_gvec_add_armeb
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#define tcg_gen_gvec_and tcg_gen_gvec_and_armeb
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#define tcg_gen_gvec_andc tcg_gen_gvec_andc_armeb
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#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_armeb
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#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_armeb
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#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_armeb
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#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_armeb
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@ -1625,7 +1625,31 @@ symbols = (
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'helper_gvec_dup16',
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'helper_gvec_dup32',
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'helper_gvec_dup64',
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'helper_gvec_eq8',
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'helper_gvec_eq16',
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'helper_gvec_eq32',
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'helper_gvec_eq64',
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'helper_gvec_le8',
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'helper_gvec_le16',
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'helper_gvec_le32',
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'helper_gvec_le64',
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'helper_gvec_leu8',
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'helper_gvec_leu16',
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'helper_gvec_leu32',
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'helper_gvec_leu64',
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'helper_gvec_lt8',
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'helper_gvec_lt16',
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'helper_gvec_lt32',
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'helper_gvec_lt64',
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'helper_gvec_ltu8',
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'helper_gvec_ltu16',
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'helper_gvec_ltu32',
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'helper_gvec_ltu64',
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'helper_gvec_mov',
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'helper_gvec_ne8',
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'helper_gvec_ne16',
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'helper_gvec_ne32',
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'helper_gvec_ne64',
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'helper_gvec_neg8',
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'helper_gvec_neg16',
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'helper_gvec_neg32',
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@ -3085,6 +3109,7 @@ symbols = (
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'tcg_gen_clz_i64',
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'tcg_gen_clzi_i32',
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'tcg_gen_clzi_i64',
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'tcg_gen_cmp_vec',
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'tcg_gen_ctpop_i32',
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'tcg_gen_ctpop_i64',
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'tcg_gen_ctz_i32',
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@ -3145,6 +3170,7 @@ symbols = (
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'tcg_gen_gvec_add',
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'tcg_gen_gvec_and',
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'tcg_gen_gvec_andc',
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'tcg_gen_gvec_cmp',
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'tcg_gen_gvec_dup8i',
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'tcg_gen_gvec_dup16i',
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'tcg_gen_gvec_dup32i',
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26
qemu/m68k.h
26
qemu/m68k.h
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@ -1619,7 +1619,31 @@
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#define helper_gvec_dup16 helper_gvec_dup16_m68k
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#define helper_gvec_dup32 helper_gvec_dup32_m68k
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#define helper_gvec_dup64 helper_gvec_dup64_m68k
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#define helper_gvec_eq8 helper_gvec_eq8_m68k
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#define helper_gvec_eq16 helper_gvec_eq16_m68k
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#define helper_gvec_eq32 helper_gvec_eq32_m68k
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#define helper_gvec_eq64 helper_gvec_eq64_m68k
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#define helper_gvec_le8 helper_gvec_le8_m68k
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#define helper_gvec_le16 helper_gvec_le16_m68k
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#define helper_gvec_le32 helper_gvec_le32_m68k
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#define helper_gvec_le64 helper_gvec_le64_m68k
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#define helper_gvec_leu8 helper_gvec_leu8_m68k
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#define helper_gvec_leu16 helper_gvec_leu16_m68k
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#define helper_gvec_leu32 helper_gvec_leu32_m68k
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#define helper_gvec_leu64 helper_gvec_leu64_m68k
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#define helper_gvec_lt8 helper_gvec_lt8_m68k
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#define helper_gvec_lt16 helper_gvec_lt16_m68k
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#define helper_gvec_lt32 helper_gvec_lt32_m68k
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#define helper_gvec_lt64 helper_gvec_lt64_m68k
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#define helper_gvec_ltu8 helper_gvec_ltu8_m68k
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#define helper_gvec_ltu16 helper_gvec_ltu16_m68k
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#define helper_gvec_ltu32 helper_gvec_ltu32_m68k
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#define helper_gvec_ltu64 helper_gvec_ltu64_m68k
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#define helper_gvec_mov helper_gvec_mov_m68k
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#define helper_gvec_ne8 helper_gvec_ne8_m68k
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#define helper_gvec_ne16 helper_gvec_ne16_m68k
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#define helper_gvec_ne32 helper_gvec_ne32_m68k
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#define helper_gvec_ne64 helper_gvec_ne64_m68k
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#define helper_gvec_neg8 helper_gvec_neg8_m68k
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#define helper_gvec_neg16 helper_gvec_neg16_m68k
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#define helper_gvec_neg32 helper_gvec_neg32_m68k
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@ -3079,6 +3103,7 @@
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#define tcg_gen_clz_i64 tcg_gen_clz_i64_m68k
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#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_m68k
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#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_m68k
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#define tcg_gen_cmp_vec tcg_gen_cmp_vec_m68k
|
||||
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_m68k
|
||||
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_m68k
|
||||
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_m68k
|
||||
|
|
@ -3139,6 +3164,7 @@
|
|||
#define tcg_gen_gvec_add tcg_gen_gvec_add_m68k
|
||||
#define tcg_gen_gvec_and tcg_gen_gvec_and_m68k
|
||||
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_m68k
|
||||
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_m68k
|
||||
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_m68k
|
||||
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_m68k
|
||||
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_m68k
|
||||
|
|
|
|||
26
qemu/mips.h
26
qemu/mips.h
|
|
@ -1619,7 +1619,31 @@
|
|||
#define helper_gvec_dup16 helper_gvec_dup16_mips
|
||||
#define helper_gvec_dup32 helper_gvec_dup32_mips
|
||||
#define helper_gvec_dup64 helper_gvec_dup64_mips
|
||||
#define helper_gvec_eq8 helper_gvec_eq8_mips
|
||||
#define helper_gvec_eq16 helper_gvec_eq16_mips
|
||||
#define helper_gvec_eq32 helper_gvec_eq32_mips
|
||||
#define helper_gvec_eq64 helper_gvec_eq64_mips
|
||||
#define helper_gvec_le8 helper_gvec_le8_mips
|
||||
#define helper_gvec_le16 helper_gvec_le16_mips
|
||||
#define helper_gvec_le32 helper_gvec_le32_mips
|
||||
#define helper_gvec_le64 helper_gvec_le64_mips
|
||||
#define helper_gvec_leu8 helper_gvec_leu8_mips
|
||||
#define helper_gvec_leu16 helper_gvec_leu16_mips
|
||||
#define helper_gvec_leu32 helper_gvec_leu32_mips
|
||||
#define helper_gvec_leu64 helper_gvec_leu64_mips
|
||||
#define helper_gvec_lt8 helper_gvec_lt8_mips
|
||||
#define helper_gvec_lt16 helper_gvec_lt16_mips
|
||||
#define helper_gvec_lt32 helper_gvec_lt32_mips
|
||||
#define helper_gvec_lt64 helper_gvec_lt64_mips
|
||||
#define helper_gvec_ltu8 helper_gvec_ltu8_mips
|
||||
#define helper_gvec_ltu16 helper_gvec_ltu16_mips
|
||||
#define helper_gvec_ltu32 helper_gvec_ltu32_mips
|
||||
#define helper_gvec_ltu64 helper_gvec_ltu64_mips
|
||||
#define helper_gvec_mov helper_gvec_mov_mips
|
||||
#define helper_gvec_ne8 helper_gvec_ne8_mips
|
||||
#define helper_gvec_ne16 helper_gvec_ne16_mips
|
||||
#define helper_gvec_ne32 helper_gvec_ne32_mips
|
||||
#define helper_gvec_ne64 helper_gvec_ne64_mips
|
||||
#define helper_gvec_neg8 helper_gvec_neg8_mips
|
||||
#define helper_gvec_neg16 helper_gvec_neg16_mips
|
||||
#define helper_gvec_neg32 helper_gvec_neg32_mips
|
||||
|
|
@ -3079,6 +3103,7 @@
|
|||
#define tcg_gen_clz_i64 tcg_gen_clz_i64_mips
|
||||
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_mips
|
||||
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_mips
|
||||
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_mips
|
||||
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_mips
|
||||
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_mips
|
||||
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_mips
|
||||
|
|
@ -3139,6 +3164,7 @@
|
|||
#define tcg_gen_gvec_add tcg_gen_gvec_add_mips
|
||||
#define tcg_gen_gvec_and tcg_gen_gvec_and_mips
|
||||
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_mips
|
||||
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_mips
|
||||
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_mips
|
||||
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_mips
|
||||
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_mips
|
||||
|
|
|
|||
|
|
@ -1619,7 +1619,31 @@
|
|||
#define helper_gvec_dup16 helper_gvec_dup16_mips64
|
||||
#define helper_gvec_dup32 helper_gvec_dup32_mips64
|
||||
#define helper_gvec_dup64 helper_gvec_dup64_mips64
|
||||
#define helper_gvec_eq8 helper_gvec_eq8_mips64
|
||||
#define helper_gvec_eq16 helper_gvec_eq16_mips64
|
||||
#define helper_gvec_eq32 helper_gvec_eq32_mips64
|
||||
#define helper_gvec_eq64 helper_gvec_eq64_mips64
|
||||
#define helper_gvec_le8 helper_gvec_le8_mips64
|
||||
#define helper_gvec_le16 helper_gvec_le16_mips64
|
||||
#define helper_gvec_le32 helper_gvec_le32_mips64
|
||||
#define helper_gvec_le64 helper_gvec_le64_mips64
|
||||
#define helper_gvec_leu8 helper_gvec_leu8_mips64
|
||||
#define helper_gvec_leu16 helper_gvec_leu16_mips64
|
||||
#define helper_gvec_leu32 helper_gvec_leu32_mips64
|
||||
#define helper_gvec_leu64 helper_gvec_leu64_mips64
|
||||
#define helper_gvec_lt8 helper_gvec_lt8_mips64
|
||||
#define helper_gvec_lt16 helper_gvec_lt16_mips64
|
||||
#define helper_gvec_lt32 helper_gvec_lt32_mips64
|
||||
#define helper_gvec_lt64 helper_gvec_lt64_mips64
|
||||
#define helper_gvec_ltu8 helper_gvec_ltu8_mips64
|
||||
#define helper_gvec_ltu16 helper_gvec_ltu16_mips64
|
||||
#define helper_gvec_ltu32 helper_gvec_ltu32_mips64
|
||||
#define helper_gvec_ltu64 helper_gvec_ltu64_mips64
|
||||
#define helper_gvec_mov helper_gvec_mov_mips64
|
||||
#define helper_gvec_ne8 helper_gvec_ne8_mips64
|
||||
#define helper_gvec_ne16 helper_gvec_ne16_mips64
|
||||
#define helper_gvec_ne32 helper_gvec_ne32_mips64
|
||||
#define helper_gvec_ne64 helper_gvec_ne64_mips64
|
||||
#define helper_gvec_neg8 helper_gvec_neg8_mips64
|
||||
#define helper_gvec_neg16 helper_gvec_neg16_mips64
|
||||
#define helper_gvec_neg32 helper_gvec_neg32_mips64
|
||||
|
|
@ -3079,6 +3103,7 @@
|
|||
#define tcg_gen_clz_i64 tcg_gen_clz_i64_mips64
|
||||
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_mips64
|
||||
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_mips64
|
||||
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_mips64
|
||||
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_mips64
|
||||
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_mips64
|
||||
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_mips64
|
||||
|
|
@ -3139,6 +3164,7 @@
|
|||
#define tcg_gen_gvec_add tcg_gen_gvec_add_mips64
|
||||
#define tcg_gen_gvec_and tcg_gen_gvec_and_mips64
|
||||
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_mips64
|
||||
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_mips64
|
||||
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_mips64
|
||||
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_mips64
|
||||
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_mips64
|
||||
|
|
|
|||
|
|
@ -1619,7 +1619,31 @@
|
|||
#define helper_gvec_dup16 helper_gvec_dup16_mips64el
|
||||
#define helper_gvec_dup32 helper_gvec_dup32_mips64el
|
||||
#define helper_gvec_dup64 helper_gvec_dup64_mips64el
|
||||
#define helper_gvec_eq8 helper_gvec_eq8_mips64el
|
||||
#define helper_gvec_eq16 helper_gvec_eq16_mips64el
|
||||
#define helper_gvec_eq32 helper_gvec_eq32_mips64el
|
||||
#define helper_gvec_eq64 helper_gvec_eq64_mips64el
|
||||
#define helper_gvec_le8 helper_gvec_le8_mips64el
|
||||
#define helper_gvec_le16 helper_gvec_le16_mips64el
|
||||
#define helper_gvec_le32 helper_gvec_le32_mips64el
|
||||
#define helper_gvec_le64 helper_gvec_le64_mips64el
|
||||
#define helper_gvec_leu8 helper_gvec_leu8_mips64el
|
||||
#define helper_gvec_leu16 helper_gvec_leu16_mips64el
|
||||
#define helper_gvec_leu32 helper_gvec_leu32_mips64el
|
||||
#define helper_gvec_leu64 helper_gvec_leu64_mips64el
|
||||
#define helper_gvec_lt8 helper_gvec_lt8_mips64el
|
||||
#define helper_gvec_lt16 helper_gvec_lt16_mips64el
|
||||
#define helper_gvec_lt32 helper_gvec_lt32_mips64el
|
||||
#define helper_gvec_lt64 helper_gvec_lt64_mips64el
|
||||
#define helper_gvec_ltu8 helper_gvec_ltu8_mips64el
|
||||
#define helper_gvec_ltu16 helper_gvec_ltu16_mips64el
|
||||
#define helper_gvec_ltu32 helper_gvec_ltu32_mips64el
|
||||
#define helper_gvec_ltu64 helper_gvec_ltu64_mips64el
|
||||
#define helper_gvec_mov helper_gvec_mov_mips64el
|
||||
#define helper_gvec_ne8 helper_gvec_ne8_mips64el
|
||||
#define helper_gvec_ne16 helper_gvec_ne16_mips64el
|
||||
#define helper_gvec_ne32 helper_gvec_ne32_mips64el
|
||||
#define helper_gvec_ne64 helper_gvec_ne64_mips64el
|
||||
#define helper_gvec_neg8 helper_gvec_neg8_mips64el
|
||||
#define helper_gvec_neg16 helper_gvec_neg16_mips64el
|
||||
#define helper_gvec_neg32 helper_gvec_neg32_mips64el
|
||||
|
|
@ -3079,6 +3103,7 @@
|
|||
#define tcg_gen_clz_i64 tcg_gen_clz_i64_mips64el
|
||||
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_mips64el
|
||||
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_mips64el
|
||||
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_mips64el
|
||||
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_mips64el
|
||||
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_mips64el
|
||||
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_mips64el
|
||||
|
|
@ -3139,6 +3164,7 @@
|
|||
#define tcg_gen_gvec_add tcg_gen_gvec_add_mips64el
|
||||
#define tcg_gen_gvec_and tcg_gen_gvec_and_mips64el
|
||||
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_mips64el
|
||||
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_mips64el
|
||||
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_mips64el
|
||||
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_mips64el
|
||||
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_mips64el
|
||||
|
|
|
|||
|
|
@ -1619,7 +1619,31 @@
|
|||
#define helper_gvec_dup16 helper_gvec_dup16_mipsel
|
||||
#define helper_gvec_dup32 helper_gvec_dup32_mipsel
|
||||
#define helper_gvec_dup64 helper_gvec_dup64_mipsel
|
||||
#define helper_gvec_eq8 helper_gvec_eq8_mipsel
|
||||
#define helper_gvec_eq16 helper_gvec_eq16_mipsel
|
||||
#define helper_gvec_eq32 helper_gvec_eq32_mipsel
|
||||
#define helper_gvec_eq64 helper_gvec_eq64_mipsel
|
||||
#define helper_gvec_le8 helper_gvec_le8_mipsel
|
||||
#define helper_gvec_le16 helper_gvec_le16_mipsel
|
||||
#define helper_gvec_le32 helper_gvec_le32_mipsel
|
||||
#define helper_gvec_le64 helper_gvec_le64_mipsel
|
||||
#define helper_gvec_leu8 helper_gvec_leu8_mipsel
|
||||
#define helper_gvec_leu16 helper_gvec_leu16_mipsel
|
||||
#define helper_gvec_leu32 helper_gvec_leu32_mipsel
|
||||
#define helper_gvec_leu64 helper_gvec_leu64_mipsel
|
||||
#define helper_gvec_lt8 helper_gvec_lt8_mipsel
|
||||
#define helper_gvec_lt16 helper_gvec_lt16_mipsel
|
||||
#define helper_gvec_lt32 helper_gvec_lt32_mipsel
|
||||
#define helper_gvec_lt64 helper_gvec_lt64_mipsel
|
||||
#define helper_gvec_ltu8 helper_gvec_ltu8_mipsel
|
||||
#define helper_gvec_ltu16 helper_gvec_ltu16_mipsel
|
||||
#define helper_gvec_ltu32 helper_gvec_ltu32_mipsel
|
||||
#define helper_gvec_ltu64 helper_gvec_ltu64_mipsel
|
||||
#define helper_gvec_mov helper_gvec_mov_mipsel
|
||||
#define helper_gvec_ne8 helper_gvec_ne8_mipsel
|
||||
#define helper_gvec_ne16 helper_gvec_ne16_mipsel
|
||||
#define helper_gvec_ne32 helper_gvec_ne32_mipsel
|
||||
#define helper_gvec_ne64 helper_gvec_ne64_mipsel
|
||||
#define helper_gvec_neg8 helper_gvec_neg8_mipsel
|
||||
#define helper_gvec_neg16 helper_gvec_neg16_mipsel
|
||||
#define helper_gvec_neg32 helper_gvec_neg32_mipsel
|
||||
|
|
@ -3079,6 +3103,7 @@
|
|||
#define tcg_gen_clz_i64 tcg_gen_clz_i64_mipsel
|
||||
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_mipsel
|
||||
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_mipsel
|
||||
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_mipsel
|
||||
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_mipsel
|
||||
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_mipsel
|
||||
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_mipsel
|
||||
|
|
@ -3139,6 +3164,7 @@
|
|||
#define tcg_gen_gvec_add tcg_gen_gvec_add_mipsel
|
||||
#define tcg_gen_gvec_and tcg_gen_gvec_and_mipsel
|
||||
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_mipsel
|
||||
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_mipsel
|
||||
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_mipsel
|
||||
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_mipsel
|
||||
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_mipsel
|
||||
|
|
|
|||
|
|
@ -1619,7 +1619,31 @@
|
|||
#define helper_gvec_dup16 helper_gvec_dup16_powerpc
|
||||
#define helper_gvec_dup32 helper_gvec_dup32_powerpc
|
||||
#define helper_gvec_dup64 helper_gvec_dup64_powerpc
|
||||
#define helper_gvec_eq8 helper_gvec_eq8_powerpc
|
||||
#define helper_gvec_eq16 helper_gvec_eq16_powerpc
|
||||
#define helper_gvec_eq32 helper_gvec_eq32_powerpc
|
||||
#define helper_gvec_eq64 helper_gvec_eq64_powerpc
|
||||
#define helper_gvec_le8 helper_gvec_le8_powerpc
|
||||
#define helper_gvec_le16 helper_gvec_le16_powerpc
|
||||
#define helper_gvec_le32 helper_gvec_le32_powerpc
|
||||
#define helper_gvec_le64 helper_gvec_le64_powerpc
|
||||
#define helper_gvec_leu8 helper_gvec_leu8_powerpc
|
||||
#define helper_gvec_leu16 helper_gvec_leu16_powerpc
|
||||
#define helper_gvec_leu32 helper_gvec_leu32_powerpc
|
||||
#define helper_gvec_leu64 helper_gvec_leu64_powerpc
|
||||
#define helper_gvec_lt8 helper_gvec_lt8_powerpc
|
||||
#define helper_gvec_lt16 helper_gvec_lt16_powerpc
|
||||
#define helper_gvec_lt32 helper_gvec_lt32_powerpc
|
||||
#define helper_gvec_lt64 helper_gvec_lt64_powerpc
|
||||
#define helper_gvec_ltu8 helper_gvec_ltu8_powerpc
|
||||
#define helper_gvec_ltu16 helper_gvec_ltu16_powerpc
|
||||
#define helper_gvec_ltu32 helper_gvec_ltu32_powerpc
|
||||
#define helper_gvec_ltu64 helper_gvec_ltu64_powerpc
|
||||
#define helper_gvec_mov helper_gvec_mov_powerpc
|
||||
#define helper_gvec_ne8 helper_gvec_ne8_powerpc
|
||||
#define helper_gvec_ne16 helper_gvec_ne16_powerpc
|
||||
#define helper_gvec_ne32 helper_gvec_ne32_powerpc
|
||||
#define helper_gvec_ne64 helper_gvec_ne64_powerpc
|
||||
#define helper_gvec_neg8 helper_gvec_neg8_powerpc
|
||||
#define helper_gvec_neg16 helper_gvec_neg16_powerpc
|
||||
#define helper_gvec_neg32 helper_gvec_neg32_powerpc
|
||||
|
|
@ -3079,6 +3103,7 @@
|
|||
#define tcg_gen_clz_i64 tcg_gen_clz_i64_powerpc
|
||||
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_powerpc
|
||||
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_powerpc
|
||||
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_powerpc
|
||||
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_powerpc
|
||||
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_powerpc
|
||||
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_powerpc
|
||||
|
|
@ -3139,6 +3164,7 @@
|
|||
#define tcg_gen_gvec_add tcg_gen_gvec_add_powerpc
|
||||
#define tcg_gen_gvec_and tcg_gen_gvec_and_powerpc
|
||||
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_powerpc
|
||||
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_powerpc
|
||||
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_powerpc
|
||||
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_powerpc
|
||||
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_powerpc
|
||||
|
|
|
|||
26
qemu/sparc.h
26
qemu/sparc.h
|
|
@ -1619,7 +1619,31 @@
|
|||
#define helper_gvec_dup16 helper_gvec_dup16_sparc
|
||||
#define helper_gvec_dup32 helper_gvec_dup32_sparc
|
||||
#define helper_gvec_dup64 helper_gvec_dup64_sparc
|
||||
#define helper_gvec_eq8 helper_gvec_eq8_sparc
|
||||
#define helper_gvec_eq16 helper_gvec_eq16_sparc
|
||||
#define helper_gvec_eq32 helper_gvec_eq32_sparc
|
||||
#define helper_gvec_eq64 helper_gvec_eq64_sparc
|
||||
#define helper_gvec_le8 helper_gvec_le8_sparc
|
||||
#define helper_gvec_le16 helper_gvec_le16_sparc
|
||||
#define helper_gvec_le32 helper_gvec_le32_sparc
|
||||
#define helper_gvec_le64 helper_gvec_le64_sparc
|
||||
#define helper_gvec_leu8 helper_gvec_leu8_sparc
|
||||
#define helper_gvec_leu16 helper_gvec_leu16_sparc
|
||||
#define helper_gvec_leu32 helper_gvec_leu32_sparc
|
||||
#define helper_gvec_leu64 helper_gvec_leu64_sparc
|
||||
#define helper_gvec_lt8 helper_gvec_lt8_sparc
|
||||
#define helper_gvec_lt16 helper_gvec_lt16_sparc
|
||||
#define helper_gvec_lt32 helper_gvec_lt32_sparc
|
||||
#define helper_gvec_lt64 helper_gvec_lt64_sparc
|
||||
#define helper_gvec_ltu8 helper_gvec_ltu8_sparc
|
||||
#define helper_gvec_ltu16 helper_gvec_ltu16_sparc
|
||||
#define helper_gvec_ltu32 helper_gvec_ltu32_sparc
|
||||
#define helper_gvec_ltu64 helper_gvec_ltu64_sparc
|
||||
#define helper_gvec_mov helper_gvec_mov_sparc
|
||||
#define helper_gvec_ne8 helper_gvec_ne8_sparc
|
||||
#define helper_gvec_ne16 helper_gvec_ne16_sparc
|
||||
#define helper_gvec_ne32 helper_gvec_ne32_sparc
|
||||
#define helper_gvec_ne64 helper_gvec_ne64_sparc
|
||||
#define helper_gvec_neg8 helper_gvec_neg8_sparc
|
||||
#define helper_gvec_neg16 helper_gvec_neg16_sparc
|
||||
#define helper_gvec_neg32 helper_gvec_neg32_sparc
|
||||
|
|
@ -3079,6 +3103,7 @@
|
|||
#define tcg_gen_clz_i64 tcg_gen_clz_i64_sparc
|
||||
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_sparc
|
||||
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_sparc
|
||||
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_sparc
|
||||
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_sparc
|
||||
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_sparc
|
||||
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_sparc
|
||||
|
|
@ -3139,6 +3164,7 @@
|
|||
#define tcg_gen_gvec_add tcg_gen_gvec_add_sparc
|
||||
#define tcg_gen_gvec_and tcg_gen_gvec_and_sparc
|
||||
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_sparc
|
||||
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_sparc
|
||||
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_sparc
|
||||
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_sparc
|
||||
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_sparc
|
||||
|
|
|
|||
|
|
@ -1619,7 +1619,31 @@
|
|||
#define helper_gvec_dup16 helper_gvec_dup16_sparc64
|
||||
#define helper_gvec_dup32 helper_gvec_dup32_sparc64
|
||||
#define helper_gvec_dup64 helper_gvec_dup64_sparc64
|
||||
#define helper_gvec_eq8 helper_gvec_eq8_sparc64
|
||||
#define helper_gvec_eq16 helper_gvec_eq16_sparc64
|
||||
#define helper_gvec_eq32 helper_gvec_eq32_sparc64
|
||||
#define helper_gvec_eq64 helper_gvec_eq64_sparc64
|
||||
#define helper_gvec_le8 helper_gvec_le8_sparc64
|
||||
#define helper_gvec_le16 helper_gvec_le16_sparc64
|
||||
#define helper_gvec_le32 helper_gvec_le32_sparc64
|
||||
#define helper_gvec_le64 helper_gvec_le64_sparc64
|
||||
#define helper_gvec_leu8 helper_gvec_leu8_sparc64
|
||||
#define helper_gvec_leu16 helper_gvec_leu16_sparc64
|
||||
#define helper_gvec_leu32 helper_gvec_leu32_sparc64
|
||||
#define helper_gvec_leu64 helper_gvec_leu64_sparc64
|
||||
#define helper_gvec_lt8 helper_gvec_lt8_sparc64
|
||||
#define helper_gvec_lt16 helper_gvec_lt16_sparc64
|
||||
#define helper_gvec_lt32 helper_gvec_lt32_sparc64
|
||||
#define helper_gvec_lt64 helper_gvec_lt64_sparc64
|
||||
#define helper_gvec_ltu8 helper_gvec_ltu8_sparc64
|
||||
#define helper_gvec_ltu16 helper_gvec_ltu16_sparc64
|
||||
#define helper_gvec_ltu32 helper_gvec_ltu32_sparc64
|
||||
#define helper_gvec_ltu64 helper_gvec_ltu64_sparc64
|
||||
#define helper_gvec_mov helper_gvec_mov_sparc64
|
||||
#define helper_gvec_ne8 helper_gvec_ne8_sparc64
|
||||
#define helper_gvec_ne16 helper_gvec_ne16_sparc64
|
||||
#define helper_gvec_ne32 helper_gvec_ne32_sparc64
|
||||
#define helper_gvec_ne64 helper_gvec_ne64_sparc64
|
||||
#define helper_gvec_neg8 helper_gvec_neg8_sparc64
|
||||
#define helper_gvec_neg16 helper_gvec_neg16_sparc64
|
||||
#define helper_gvec_neg32 helper_gvec_neg32_sparc64
|
||||
|
|
@ -3079,6 +3103,7 @@
|
|||
#define tcg_gen_clz_i64 tcg_gen_clz_i64_sparc64
|
||||
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_sparc64
|
||||
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_sparc64
|
||||
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_sparc64
|
||||
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_sparc64
|
||||
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_sparc64
|
||||
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_sparc64
|
||||
|
|
@ -3139,6 +3164,7 @@
|
|||
#define tcg_gen_gvec_add tcg_gen_gvec_add_sparc64
|
||||
#define tcg_gen_gvec_and tcg_gen_gvec_and_sparc64
|
||||
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_sparc64
|
||||
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_sparc64
|
||||
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_sparc64
|
||||
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_sparc64
|
||||
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_sparc64
|
||||
|
|
|
|||
|
|
@ -467,3 +467,39 @@ void HELPER(gvec_sar64i)(void *d, void *a, uint32_t desc)
|
|||
}
|
||||
clear_high(d, oprsz, desc);
|
||||
}
|
||||
|
||||
/* If vectors are enabled, the compiler fills in -1 for true.
|
||||
Otherwise, we must take care of this by hand. */
|
||||
#ifdef CONFIG_VECTOR16
|
||||
# define DO_CMP0(X) X
|
||||
#else
|
||||
# define DO_CMP0(X) -(X)
|
||||
#endif
|
||||
|
||||
#define DO_CMP1(NAME, TYPE, OP) \
|
||||
void HELPER(NAME)(void *d, void *a, void *b, uint32_t desc) \
|
||||
{ \
|
||||
intptr_t oprsz = simd_oprsz(desc); \
|
||||
intptr_t i; \
|
||||
for (i = 0; i < oprsz; i += sizeof(vec64)) { \
|
||||
*(TYPE *)(d + i) = DO_CMP0(*(TYPE *)(a + i) OP *(TYPE *)(b + i)); \
|
||||
} \
|
||||
clear_high(d, oprsz, desc); \
|
||||
}
|
||||
|
||||
#define DO_CMP2(SZ) \
|
||||
DO_CMP1(gvec_eq##SZ, vec##SZ, ==) \
|
||||
DO_CMP1(gvec_ne##SZ, vec##SZ, !=) \
|
||||
DO_CMP1(gvec_lt##SZ, svec##SZ, <) \
|
||||
DO_CMP1(gvec_le##SZ, svec##SZ, <=) \
|
||||
DO_CMP1(gvec_ltu##SZ, vec##SZ, <) \
|
||||
DO_CMP1(gvec_leu##SZ, vec##SZ, <=)
|
||||
|
||||
DO_CMP2(8)
|
||||
DO_CMP2(16)
|
||||
DO_CMP2(32)
|
||||
DO_CMP2(64)
|
||||
|
||||
#undef DO_CMP0
|
||||
#undef DO_CMP1
|
||||
#undef DO_CMP2
|
||||
|
|
|
|||
|
|
@ -576,6 +576,10 @@ E.g. VECL=1 -> 64 << 1 -> v128, and VECE=2 -> 1 << 2 -> i32.
|
|||
|
||||
Similarly for logical and arithmetic right shift.
|
||||
|
||||
* cmp_vec v0, v1, v2, cond
|
||||
|
||||
Compare vectors by element, storing -1 for true and 0 for false.
|
||||
|
||||
*********
|
||||
|
||||
Note 1: Some shortcuts are defined when the last operand is known to be
|
||||
|
|
|
|||
|
|
@ -1584,3 +1584,154 @@ void tcg_gen_gvec_sari(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aof
|
|||
tcg_gen_gvec_2i(s, dofs, aofs, oprsz, maxsz, shift, &g[vece]);
|
||||
}
|
||||
}
|
||||
|
||||
/* Expand OPSZ bytes worth of three-operand operations using i32 elements. */
|
||||
static void expand_cmp_i32(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bofs,
|
||||
uint32_t oprsz, TCGCond cond)
|
||||
{
|
||||
TCGv_i32 t0 = tcg_temp_new_i32(s);
|
||||
TCGv_i32 t1 = tcg_temp_new_i32(s);
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < oprsz; i += 4) {
|
||||
tcg_gen_ld_i32(s, t0, s->cpu_env, aofs + i);
|
||||
tcg_gen_ld_i32(s, t1, s->cpu_env, bofs + i);
|
||||
tcg_gen_setcond_i32(s, cond, t0, t0, t1);
|
||||
tcg_gen_neg_i32(s, t0, t0);
|
||||
tcg_gen_st_i32(s, t0, s->cpu_env, dofs + i);
|
||||
}
|
||||
tcg_temp_free_i32(s, t1);
|
||||
tcg_temp_free_i32(s, t0);
|
||||
}
|
||||
|
||||
static void expand_cmp_i64(TCGContext *s, uint32_t dofs, uint32_t aofs, uint32_t bofs,
|
||||
uint32_t oprsz, TCGCond cond)
|
||||
{
|
||||
TCGv_i64 t0 = tcg_temp_new_i64(s);
|
||||
TCGv_i64 t1 = tcg_temp_new_i64(s);
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < oprsz; i += 8) {
|
||||
tcg_gen_ld_i64(s, t0, s->cpu_env, aofs + i);
|
||||
tcg_gen_ld_i64(s, t1, s->cpu_env, bofs + i);
|
||||
tcg_gen_setcond_i64(s, cond, t0, t0, t1);
|
||||
tcg_gen_neg_i64(s, t0, t0);
|
||||
tcg_gen_st_i64(s, t0, s->cpu_env, dofs + i);
|
||||
}
|
||||
tcg_temp_free_i64(s, t1);
|
||||
tcg_temp_free_i64(s, t0);
|
||||
}
|
||||
|
||||
static void expand_cmp_vec(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||
uint32_t bofs, uint32_t oprsz, uint32_t tysz,
|
||||
TCGType type, TCGCond cond)
|
||||
{
|
||||
TCGv_vec t0 = tcg_temp_new_vec(s, type);
|
||||
TCGv_vec t1 = tcg_temp_new_vec(s, type);
|
||||
uint32_t i;
|
||||
|
||||
for (i = 0; i < oprsz; i += tysz) {
|
||||
tcg_gen_ld_vec(s, t0, s->cpu_env, aofs + i);
|
||||
tcg_gen_ld_vec(s, t1, s->cpu_env, bofs + i);
|
||||
tcg_gen_cmp_vec(s, cond, vece, t0, t0, t1);
|
||||
tcg_gen_st_vec(s, t0, s->cpu_env, dofs + i);
|
||||
}
|
||||
tcg_temp_free_vec(s, t1);
|
||||
tcg_temp_free_vec(s, t0);
|
||||
}
|
||||
|
||||
void tcg_gen_gvec_cmp(TCGContext *s, TCGCond cond, unsigned vece, uint32_t dofs,
|
||||
uint32_t aofs, uint32_t bofs,
|
||||
uint32_t oprsz, uint32_t maxsz)
|
||||
{
|
||||
static gen_helper_gvec_3 * const eq_fn[4] = {
|
||||
gen_helper_gvec_eq8, gen_helper_gvec_eq16,
|
||||
gen_helper_gvec_eq32, gen_helper_gvec_eq64
|
||||
};
|
||||
static gen_helper_gvec_3 * const ne_fn[4] = {
|
||||
gen_helper_gvec_ne8, gen_helper_gvec_ne16,
|
||||
gen_helper_gvec_ne32, gen_helper_gvec_ne64
|
||||
};
|
||||
static gen_helper_gvec_3 * const lt_fn[4] = {
|
||||
gen_helper_gvec_lt8, gen_helper_gvec_lt16,
|
||||
gen_helper_gvec_lt32, gen_helper_gvec_lt64
|
||||
};
|
||||
static gen_helper_gvec_3 * const le_fn[4] = {
|
||||
gen_helper_gvec_le8, gen_helper_gvec_le16,
|
||||
gen_helper_gvec_le32, gen_helper_gvec_le64
|
||||
};
|
||||
static gen_helper_gvec_3 * const ltu_fn[4] = {
|
||||
gen_helper_gvec_ltu8, gen_helper_gvec_ltu16,
|
||||
gen_helper_gvec_ltu32, gen_helper_gvec_ltu64
|
||||
};
|
||||
static gen_helper_gvec_3 * const leu_fn[4] = {
|
||||
gen_helper_gvec_leu8, gen_helper_gvec_leu16,
|
||||
gen_helper_gvec_leu32, gen_helper_gvec_leu64
|
||||
};
|
||||
static gen_helper_gvec_3 * const * const fns[16] = {
|
||||
[TCG_COND_EQ] = eq_fn,
|
||||
[TCG_COND_NE] = ne_fn,
|
||||
[TCG_COND_LT] = lt_fn,
|
||||
[TCG_COND_LE] = le_fn,
|
||||
[TCG_COND_LTU] = ltu_fn,
|
||||
[TCG_COND_LEU] = leu_fn,
|
||||
};
|
||||
|
||||
check_size_align(oprsz, maxsz, dofs | aofs | bofs);
|
||||
check_overlap_3(dofs, aofs, bofs, maxsz);
|
||||
|
||||
if (cond == TCG_COND_NEVER || cond == TCG_COND_ALWAYS) {
|
||||
do_dup(s, MO_8, dofs, oprsz, maxsz,
|
||||
NULL, NULL, -(cond == TCG_COND_ALWAYS));
|
||||
return;
|
||||
}
|
||||
|
||||
/* Recall that ARM SVE allows vector sizes that are not a power of 2.
|
||||
Expand with successively smaller host vector sizes. The intent is
|
||||
that e.g. oprsz == 80 would be expanded with 2x32 + 1x16. */
|
||||
|
||||
if (TCG_TARGET_HAS_v256 && check_size_impl(oprsz, 32)
|
||||
&& tcg_can_emit_vec_op(INDEX_op_cmp_vec, TCG_TYPE_V256, vece)) {
|
||||
uint32_t some = QEMU_ALIGN_DOWN(oprsz, 32);
|
||||
expand_cmp_vec(s, vece, dofs, aofs, bofs, some, 32, TCG_TYPE_V256, cond);
|
||||
if (some == oprsz) {
|
||||
goto done;
|
||||
}
|
||||
dofs += some;
|
||||
aofs += some;
|
||||
bofs += some;
|
||||
oprsz -= some;
|
||||
maxsz -= some;
|
||||
}
|
||||
|
||||
if (TCG_TARGET_HAS_v128 && check_size_impl(oprsz, 16)
|
||||
&& tcg_can_emit_vec_op(INDEX_op_cmp_vec, TCG_TYPE_V128, vece)) {
|
||||
expand_cmp_vec(s, vece, dofs, aofs, bofs, oprsz, 16, TCG_TYPE_V128, cond);
|
||||
} else if (TCG_TARGET_HAS_v64
|
||||
&& check_size_impl(oprsz, 8)
|
||||
&& (TCG_TARGET_REG_BITS == 32 || vece != MO_64)
|
||||
&& tcg_can_emit_vec_op(INDEX_op_cmp_vec, TCG_TYPE_V64, vece)) {
|
||||
expand_cmp_vec(s, vece, dofs, aofs, bofs, oprsz, 8, TCG_TYPE_V64, cond);
|
||||
} else if (vece == MO_64 && check_size_impl(oprsz, 8)) {
|
||||
expand_cmp_i64(s, dofs, aofs, bofs, oprsz, cond);
|
||||
} else if (vece == MO_32 && check_size_impl(oprsz, 4)) {
|
||||
expand_cmp_i32(s, dofs, aofs, bofs, oprsz, cond);
|
||||
} else {
|
||||
gen_helper_gvec_3 * const *fn = fns[cond];
|
||||
|
||||
if (fn == NULL) {
|
||||
uint32_t tmp;
|
||||
tmp = aofs, aofs = bofs, bofs = tmp;
|
||||
cond = tcg_swap_cond(cond);
|
||||
fn = fns[cond];
|
||||
assert(fn != NULL);
|
||||
}
|
||||
tcg_gen_gvec_3_ool(s, dofs, aofs, bofs, oprsz, maxsz, 0, fn[vece]);
|
||||
return;
|
||||
}
|
||||
|
||||
done:
|
||||
if (oprsz < maxsz) {
|
||||
expand_clr(s, dofs + oprsz, maxsz - oprsz);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -202,6 +202,10 @@ void tcg_gen_gvec_shri(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aof
|
|||
void tcg_gen_gvec_sari(TCGContext *s, unsigned vece, uint32_t dofs, uint32_t aofs,
|
||||
int64_t shift, uint32_t oprsz, uint32_t maxsz);
|
||||
|
||||
void tcg_gen_gvec_cmp(TCGContext *s, TCGCond cond, unsigned vece, uint32_t dofs,
|
||||
uint32_t aofs, uint32_t bofs,
|
||||
uint32_t oprsz, uint32_t maxsz);
|
||||
|
||||
void tcg_gen_gvec_dup8i(TCGContext *, uint32_t dofs, uint32_t s, uint32_t m, uint8_t x);
|
||||
void tcg_gen_gvec_dup16i(TCGContext *, uint32_t dofs, uint32_t s, uint32_t m, uint16_t x);
|
||||
void tcg_gen_gvec_dup32i(TCGContext *, uint32_t dofs, uint32_t s, uint32_t m, uint32_t x);
|
||||
|
|
|
|||
|
|
@ -342,3 +342,26 @@ void tcg_gen_sari_vec(TCGContext *s, unsigned vece, TCGv_vec r, TCGv_vec a, int6
|
|||
{
|
||||
do_shifti(s, INDEX_op_sari_vec, vece, r, a, i);
|
||||
}
|
||||
|
||||
void tcg_gen_cmp_vec(TCGContext *s, TCGCond cond, unsigned vece,
|
||||
TCGv_vec r, TCGv_vec a, TCGv_vec b)
|
||||
{
|
||||
TCGTemp *rt = tcgv_vec_temp(s, r);
|
||||
TCGTemp *at = tcgv_vec_temp(s, a);
|
||||
TCGTemp *bt = tcgv_vec_temp(s, b);
|
||||
TCGArg ri = temp_arg(rt);
|
||||
TCGArg ai = temp_arg(at);
|
||||
TCGArg bi = temp_arg(bt);
|
||||
TCGType type = rt->base_type;
|
||||
int can;
|
||||
|
||||
tcg_debug_assert(at->base_type == type);
|
||||
tcg_debug_assert(bt->base_type == type);
|
||||
can = tcg_can_emit_vec_op(INDEX_op_cmp_vec, type, vece);
|
||||
if (can > 0) {
|
||||
vec_gen_4(s, INDEX_op_cmp_vec, type, vece, ri, ai, bi, cond);
|
||||
} else {
|
||||
tcg_debug_assert(can < 0);
|
||||
tcg_expand_vec_op(s, INDEX_op_cmp_vec, type, vece, ri, ai, bi, cond);
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}
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}
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||||
|
|
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|
@ -937,6 +937,9 @@ void tcg_gen_shli_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, int64
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void tcg_gen_shri_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
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void tcg_gen_sari_vec(TCGContext *, unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
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||||
void tcg_gen_cmp_vec(TCGContext *, TCGCond cond, unsigned vece, TCGv_vec r,
|
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TCGv_vec a, TCGv_vec b);
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|
||||
void tcg_gen_ld_vec(TCGContext *, TCGv_vec r, TCGv_ptr base, TCGArg offset);
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void tcg_gen_st_vec(TCGContext *, TCGv_vec r, TCGv_ptr base, TCGArg offset);
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void tcg_gen_stl_vec(TCGContext *, TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
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|
|
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|
@ -244,6 +244,8 @@ DEF(shlv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shv_vec))
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DEF(shrv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shv_vec))
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DEF(sarv_vec, 1, 2, 0, IMPLVEC | IMPL(TCG_TARGET_HAS_shv_vec))
|
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|
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DEF(cmp_vec, 1, 2, 1, IMPLVEC)
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||||
DEF(last_generic, 0, 0, 0, TCG_OPF_NOT_PRESENT)
|
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|
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#if TCG_TARGET_MAYBE_vec
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|
|
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|
@ -179,3 +179,33 @@ DEF_HELPER_FLAGS_3(gvec_sar8i, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
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DEF_HELPER_FLAGS_3(gvec_sar16i, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
|
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DEF_HELPER_FLAGS_3(gvec_sar32i, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_3(gvec_sar64i, TCG_CALL_NO_RWG, void, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_4(gvec_eq8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_eq16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_eq32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_eq64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_4(gvec_ne8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_ne16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_ne32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_ne64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_4(gvec_lt8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_lt16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_lt32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_lt64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_4(gvec_le8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_le16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_le32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_le64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_4(gvec_ltu8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_ltu16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_ltu32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_ltu64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
|
||||
DEF_HELPER_FLAGS_4(gvec_leu8, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_leu16, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_leu32, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_leu64, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
|
||||
|
|
|
|||
|
|
@ -1048,6 +1048,7 @@ bool tcg_op_supported(TCGOpcode op)
|
|||
case INDEX_op_and_vec:
|
||||
case INDEX_op_or_vec:
|
||||
case INDEX_op_xor_vec:
|
||||
case INDEX_op_cmp_vec:
|
||||
return have_vec;
|
||||
case INDEX_op_dup2_vec:
|
||||
return have_vec && TCG_TARGET_REG_BITS == 32;
|
||||
|
|
@ -1490,6 +1491,7 @@ void tcg_dump_ops(TCGContext *s)
|
|||
case INDEX_op_brcond_i64:
|
||||
case INDEX_op_setcond_i64:
|
||||
case INDEX_op_movcond_i64:
|
||||
case INDEX_op_cmp_vec:
|
||||
if (op->args[k] < ARRAY_SIZE(cond_name)
|
||||
&& cond_name[op->args[k]]) {
|
||||
col += qemu_log(",%s", cond_name[op->args[k++]]);
|
||||
|
|
|
|||
|
|
@ -1619,7 +1619,31 @@
|
|||
#define helper_gvec_dup16 helper_gvec_dup16_x86_64
|
||||
#define helper_gvec_dup32 helper_gvec_dup32_x86_64
|
||||
#define helper_gvec_dup64 helper_gvec_dup64_x86_64
|
||||
#define helper_gvec_eq8 helper_gvec_eq8_x86_64
|
||||
#define helper_gvec_eq16 helper_gvec_eq16_x86_64
|
||||
#define helper_gvec_eq32 helper_gvec_eq32_x86_64
|
||||
#define helper_gvec_eq64 helper_gvec_eq64_x86_64
|
||||
#define helper_gvec_le8 helper_gvec_le8_x86_64
|
||||
#define helper_gvec_le16 helper_gvec_le16_x86_64
|
||||
#define helper_gvec_le32 helper_gvec_le32_x86_64
|
||||
#define helper_gvec_le64 helper_gvec_le64_x86_64
|
||||
#define helper_gvec_leu8 helper_gvec_leu8_x86_64
|
||||
#define helper_gvec_leu16 helper_gvec_leu16_x86_64
|
||||
#define helper_gvec_leu32 helper_gvec_leu32_x86_64
|
||||
#define helper_gvec_leu64 helper_gvec_leu64_x86_64
|
||||
#define helper_gvec_lt8 helper_gvec_lt8_x86_64
|
||||
#define helper_gvec_lt16 helper_gvec_lt16_x86_64
|
||||
#define helper_gvec_lt32 helper_gvec_lt32_x86_64
|
||||
#define helper_gvec_lt64 helper_gvec_lt64_x86_64
|
||||
#define helper_gvec_ltu8 helper_gvec_ltu8_x86_64
|
||||
#define helper_gvec_ltu16 helper_gvec_ltu16_x86_64
|
||||
#define helper_gvec_ltu32 helper_gvec_ltu32_x86_64
|
||||
#define helper_gvec_ltu64 helper_gvec_ltu64_x86_64
|
||||
#define helper_gvec_mov helper_gvec_mov_x86_64
|
||||
#define helper_gvec_ne8 helper_gvec_ne8_x86_64
|
||||
#define helper_gvec_ne16 helper_gvec_ne16_x86_64
|
||||
#define helper_gvec_ne32 helper_gvec_ne32_x86_64
|
||||
#define helper_gvec_ne64 helper_gvec_ne64_x86_64
|
||||
#define helper_gvec_neg8 helper_gvec_neg8_x86_64
|
||||
#define helper_gvec_neg16 helper_gvec_neg16_x86_64
|
||||
#define helper_gvec_neg32 helper_gvec_neg32_x86_64
|
||||
|
|
@ -3079,6 +3103,7 @@
|
|||
#define tcg_gen_clz_i64 tcg_gen_clz_i64_x86_64
|
||||
#define tcg_gen_clzi_i32 tcg_gen_clzi_i32_x86_64
|
||||
#define tcg_gen_clzi_i64 tcg_gen_clzi_i64_x86_64
|
||||
#define tcg_gen_cmp_vec tcg_gen_cmp_vec_x86_64
|
||||
#define tcg_gen_ctpop_i32 tcg_gen_ctpop_i32_x86_64
|
||||
#define tcg_gen_ctpop_i64 tcg_gen_ctpop_i64_x86_64
|
||||
#define tcg_gen_ctz_i32 tcg_gen_ctz_i32_x86_64
|
||||
|
|
@ -3139,6 +3164,7 @@
|
|||
#define tcg_gen_gvec_add tcg_gen_gvec_add_x86_64
|
||||
#define tcg_gen_gvec_and tcg_gen_gvec_and_x86_64
|
||||
#define tcg_gen_gvec_andc tcg_gen_gvec_andc_x86_64
|
||||
#define tcg_gen_gvec_cmp tcg_gen_gvec_cmp_x86_64
|
||||
#define tcg_gen_gvec_dup8i tcg_gen_gvec_dup8i_x86_64
|
||||
#define tcg_gen_gvec_dup16i tcg_gen_gvec_dup16i_x86_64
|
||||
#define tcg_gen_gvec_dup32i tcg_gen_gvec_dup32i_x86_64
|
||||
|
|
|
|||
Loading…
Reference in a new issue