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target/arm: New function armv7m_nvic_set_pending_lazyfp()

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In the v7M architecture, if an exception is generated in the process
of doing the lazy stacking of FP registers, the handling of
possible escalation to HardFault is treated differently to the normal
approach: it works based on the saved information about exception
readiness that was stored in the FPCCR when the stack frame was
created. Provide a new function armv7m_nvic_set_pending_lazyfp()
which pends exceptions during lazy stacking, and implements
this logic.

This corresponds to the pseudocode TakePreserveFPException().

Backports the relevant parts of commit
a99ba8ab1601904e0fa20325192fc850362ce80e from qemu
This commit is contained in:
Peter Maydell 2019-04-30 10:55:47 -04:00 committed by Lioncash
parent 3fff653e20
commit b1d6bd2792
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1 changed files with 15 additions and 0 deletions
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15
qemu/target/arm/cpu.h
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@ -1954,6 +1954,21 @@ void armv7m_nvic_set_pending(void *opaque, int irq, bool secure);
* a different exception).
*/
void armv7m_nvic_set_pending_derived(void *opaque, int irq, bool secure);
/**
* armv7m_nvic_set_pending_lazyfp: mark this lazy FP exception as pending
* @opaque: the NVIC
* @irq: the exception number to mark pending
* @secure: false for non-banked exceptions or for the nonsecure
* version of a banked exception, true for the secure version of a banked
* exception.
*
* Similar to armv7m_nvic_set_pending(), but specifically for exceptions
* generated in the course of lazy stacking of FP registers.
*/
static inline void armv7m_nvic_set_pending_lazyfp(void *opaque, int irq, bool secure)
{
// Unicorn: Currently, do nothing.
}
/**
* armv7m_nvic_get_pending_irq_info: return highest priority pending
* exception, and whether it targets Secure state