target/mips: Fix misplaced 'break' in handling of NM_SHRA_R_PH

Fix misplaced 'break' in handling of NM_SHRA_R_PH. Found by
Coverity (CID 1395627).

Backports commit d5ebcbaf09e8c14e62b2966446195be5eeabcbab from qemu
This commit is contained in:
Stefan Markovic 2018-10-23 14:32:15 -04:00 committed by Lioncash
parent 255ced3c1a
commit c3541a4b48
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@ -20109,8 +20109,8 @@ static void gen_pool32a5_nanomips_insn(DisasContext *ctx, int opc,
case 0:
/* SHRA_PH */
gen_helper_shra_ph(tcg_ctx, v1_t, t0, v1_t);
break;
gen_store_gpr(ctx, v1_t, rt);
break;
case 1:
/* SHRA_R_PH */
gen_helper_shra_r_ph(tcg_ctx, v1_t, t0, v1_t);