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target/mips: Clean up handling of CP0 register 13

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Clean up handling of CP0 register 13.

Backports commit e3c7559d8902fbb9857fb94fc5391f258cc3c4d1 from qemu
This commit is contained in:
Aleksandar Markovic 2019-11-18 23:08:19 -05:00 committed by Lioncash
parent 3f76658fd8
commit dc1e7c4467
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GPG key ID: 4E3C3CC1031BA9C7
2 changed files with 6 additions and 4 deletions
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2
qemu/target/mips/cpu.h
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@ -356,6 +356,8 @@ typedef struct mips_def_t mips_def_t;
#define CP0_REG12__GTOFFSET 7 #define CP0_REG12__GTOFFSET 7
/* CP0 Register 13 */ /* CP0 Register 13 */
#define CP0_REG13__CAUSE 0 #define CP0_REG13__CAUSE 0
#define CP0_REG13__VIEW_RIPL 4
#define CP0_REG13__NESTEDEXC 5
/* CP0 Register 14 */ /* CP0 Register 14 */
#define CP0_REG14__EPC 0 #define CP0_REG14__EPC 0
/* CP0 Register 15 */ /* CP0 Register 15 */

8
qemu/target/mips/translate.c
View file

@ -7281,7 +7281,7 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break; break;
case CP0_REGISTER_13: case CP0_REGISTER_13:
switch (sel) { switch (sel) {
case 0: case CP0_REG13__CAUSE:
gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Cause)); gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Cause));
register_name = "Cause"; register_name = "Cause";
break; break;
@ -8008,7 +8008,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break; break;
case CP0_REGISTER_13: case CP0_REGISTER_13:
switch (sel) { switch (sel) {
case 0: case CP0_REG13__CAUSE:
save_cpu_state(ctx, 1); save_cpu_state(ctx, 1);
gen_helper_mtc0_cause(tcg_ctx, tcg_ctx->cpu_env, arg); gen_helper_mtc0_cause(tcg_ctx, tcg_ctx->cpu_env, arg);
/* /*
@ -8753,7 +8753,7 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break; break;
case CP0_REGISTER_13: case CP0_REGISTER_13:
switch (sel) { switch (sel) {
case 0: case CP0_REG13__CAUSE:
gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Cause)); gen_mfc0_load32(ctx, arg, offsetof(CPUMIPSState, CP0_Cause));
register_name = "Cause"; register_name = "Cause";
break; break;
@ -9464,7 +9464,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel)
break; break;
case CP0_REGISTER_13: case CP0_REGISTER_13:
switch (sel) { switch (sel) {
case 0: case CP0_REG13__CAUSE:
save_cpu_state(ctx, 1); save_cpu_state(ctx, 1);
gen_helper_mtc0_cause(tcg_ctx, tcg_ctx->cpu_env, arg); gen_helper_mtc0_cause(tcg_ctx, tcg_ctx->cpu_env, arg);
/* /*