target/arm: Replace ARM_FEATURE_VFP3 checks with fp{sp, dp}_v3

Sort this check to the start of a trans_* function.
Merge this with any existing test for fpdp_v2.

Backports commit 84774cc37f2c17e48a4867a8e8e055deb23bea69 from qemu
This commit is contained in:
Richard Henderson 2020-03-21 23:33:11 -04:00 committed by Lioncash
parent 54e9ce5174
commit ed1ce1437a

View file

@ -728,7 +728,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a)
* VFPv2 allows access to FPSID from userspace; VFPv3 restricts * VFPv2 allows access to FPSID from userspace; VFPv3 restricts
* all ID registers to privileged access only. * all ID registers to privileged access only.
*/ */
if (IS_USER(s) && arm_dc_feature(s, ARM_FEATURE_VFP3)) { if (IS_USER(s) && dc_isar_feature(aa32_fpsp_v3, s)) {
return false; return false;
} }
ignore_vfp_enabled = true; ignore_vfp_enabled = true;
@ -757,7 +757,7 @@ static bool trans_VMSR_VMRS(DisasContext *s, arg_VMSR_VMRS *a)
case ARM_VFP_FPINST: case ARM_VFP_FPINST:
case ARM_VFP_FPINST2: case ARM_VFP_FPINST2:
/* Not present in VFPv3 */ /* Not present in VFPv3 */
if (IS_USER(s) || arm_dc_feature(s, ARM_FEATURE_VFP3)) { if (IS_USER(s) || dc_isar_feature(aa32_fpsp_v3, s)) {
return false; return false;
} }
break; break;
@ -1899,12 +1899,12 @@ static bool trans_VMOV_imm_sp(DisasContext *s, arg_VMOV_imm_sp *a)
vd = a->vd; vd = a->vd;
if (!dc_isar_feature(aa32_fpshvec, s) && if (!dc_isar_feature(aa32_fpsp_v3, s)) {
(veclen != 0 || s->vec_stride != 0)) {
return false; return false;
} }
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) { if (!dc_isar_feature(aa32_fpshvec, s) &&
(veclen != 0 || s->vec_stride != 0)) {
return false; return false;
} }
@ -1950,7 +1950,7 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a)
vd = a->vd; vd = a->vd;
if (!dc_isar_feature(aa32_fpdp_v2, s)) { if (!dc_isar_feature(aa32_fpdp_v3, s)) {
return false; return false;
} }
@ -1964,10 +1964,6 @@ static bool trans_VMOV_imm_dp(DisasContext *s, arg_VMOV_imm_dp *a)
return false; return false;
} }
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return false;
}
if (!vfp_access_check(s)) { if (!vfp_access_check(s)) {
return true; return true;
} }
@ -2611,7 +2607,7 @@ static bool trans_VCVT_fix_sp(DisasContext *s, arg_VCVT_fix_sp *a)
TCGv_ptr fpst; TCGv_ptr fpst;
int frac_bits; int frac_bits;
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) { if (!dc_isar_feature(aa32_fpsp_v3, s)) {
return false; return false;
} }
@ -2672,11 +2668,7 @@ static bool trans_VCVT_fix_dp(DisasContext *s, arg_VCVT_fix_dp *a)
TCGv_ptr fpst; TCGv_ptr fpst;
int frac_bits; int frac_bits;
if (!dc_isar_feature(aa32_fpdp_v2, s)) { if (!dc_isar_feature(aa32_fpdp_v3, s)) {
return false;
}
if (!arm_dc_feature(s, ARM_FEATURE_VFP3)) {
return false; return false;
} }