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Merge pull request #1 from MerryMage/master

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aarch64: Add PSTATE, FPCR, FPSR access
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bunnei 2018-01-21 15:40:54 -05:00 committed by GitHub
parent cd33800ae2 4128f3b259
commit ed28aa9171
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2 changed files with 24 additions and 0 deletions
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6
include/unicorn/arm64.h
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@ -290,6 +290,12 @@ typedef enum uc_arm64_reg {
UC_ARM64_REG_TPIDR_EL0,
UC_ARM64_REG_TPIDRRO_EL0,
UC_ARM64_REG_TPIDR_EL1,
UC_ARM64_REG_PSTATE, // PSTATE pseudoregister
//> floating point control and status registers
UC_ARM64_REG_FPCR,
UC_ARM64_REG_FPSR,
UC_ARM64_REG_ENDING, // <-- mark the end of the list of registers

18
qemu/target-arm/unicorn_aarch64.c
View file

@ -106,6 +106,15 @@ int arm64_reg_read(struct uc_struct *uc, unsigned int *regs, void **vals, int co
case UC_ARM64_REG_NZCV:
*(int32_t *)value = cpsr_read(&ARM_CPU(uc, mycpu)->env) & CPSR_NZCV;
break;
case UC_ARM64_REG_PSTATE:
*(uint32_t *)value = pstate_read(&ARM_CPU(uc, mycpu)->env);
break;
case UC_ARM64_REG_FPCR:
*(uint32_t *)value = vfp_get_fpcr(&ARM_CPU(uc, mycpu)->env);
break;
case UC_ARM64_REG_FPSR:
*(uint32_t *)value = vfp_get_fpsr(&ARM_CPU(uc, mycpu)->env);
break;
}
}
}
@ -174,6 +183,15 @@ int arm64_reg_write(struct uc_struct *uc, unsigned int *regs, void* const* vals,
case UC_ARM64_REG_NZCV:
cpsr_write(&ARM_CPU(uc, mycpu)->env, *(uint32_t *) value, CPSR_NZCV);
break;
case UC_ARM64_REG_PSTATE:
pstate_write(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value);
break;
case UC_ARM64_REG_FPCR:
vfp_set_fpcr(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value);
break;
case UC_ARM64_REG_FPSR:
vfp_set_fpsr(&ARM_CPU(uc, mycpu)->env, *(uint32_t *)value);
break;
}
}
}