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target-mips: add 24KEc CPU definition
Define a new CPU definition supporting 24KEc cores, similar to the existing 24Kc, but with added support for DSP instructions and MIPS16e (and without FPU). Backports commit e9deaad8a58c899dc32e9fdeff9e533070e79dca from qemu
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@ -334,6 +334,44 @@ static const mips_def_t mips_defs[] =
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CPU_MIPS32R2 | ASE_MIPS16,
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MMU_TYPE_R4000,
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},
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{
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"24KEc",
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0x00019600,
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MIPS_CONFIG0 | (0x1 << CP0C0_AR) |
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(MMU_TYPE_R4000 << CP0C0_MT),
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MIPS_CONFIG1 | (15 << CP0C1_MMU) |
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(0 << CP0C1_IS) | (3 << CP0C1_IL) | (1 << CP0C1_IA) |
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(0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) |
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(1 << CP0C1_CA),
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MIPS_CONFIG2,
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MIPS_CONFIG3 | (1 << CP0C3_DSPP) | (0 << CP0C3_VInt),
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0,0,
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0,0,
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0,
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0,
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0,
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4,
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32,
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2,
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/* we have a DSP, but no FPU */
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0x1378FF1F,
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0,
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0,
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0,
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0,
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0,
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0,
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32,
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32,
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0,0,
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0,0,
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0,0,
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0,0,
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0,0,
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0,0,
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CPU_MIPS32R2 | ASE_MIPS16 | ASE_DSP,
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MMU_TYPE_R4000,
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},
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{
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"24Kf",
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0x00019300,
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