mirror of
https://github.com/yuzu-emu/unicorn.git
synced 2024-12-23 18:05:29 +00:00
target-arm: Support multiple address spaces in page table walks
If we have a secure address space, use it in page table walks: when doing the physical accesses to read descriptors, make them through the correct address space. (The descriptor reads are the only direct physical accesses made in target-arm/ for CPUs which might have TrustZone.) Backports commit 5ce4ff6502fc6ae01a30c3917996c6c41be1d176 from qemu
This commit is contained in:
parent
d3eb5fb710
commit
f1f3ff39eb
|
@ -2051,6 +2051,15 @@ static inline int arm_asidx_from_attrs(CPUState *cs, MemTxAttrs attrs)
|
|||
{
|
||||
return attrs.secure ? ARMASIdx_S : ARMASIdx_NS;
|
||||
}
|
||||
|
||||
/* Return the AddressSpace to use for a memory access
|
||||
* (which depends on whether the access is S or NS, and whether
|
||||
* the board gave us a separate AddressSpace for S accesses).
|
||||
*/
|
||||
static inline AddressSpace *arm_addressspace(CPUState *cs, MemTxAttrs attrs)
|
||||
{
|
||||
return cpu_get_address_space(cs, arm_asidx_from_attrs(cs, attrs));
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -5617,13 +5617,15 @@ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure,
|
|||
ARMCPU *cpu = ARM_CPU(cs->uc, cs);
|
||||
CPUARMState *env = &cpu->env;
|
||||
MemTxAttrs attrs = {0};
|
||||
AddressSpace *as;
|
||||
|
||||
attrs.secure = is_secure;
|
||||
as = arm_addressspace(cs, attrs);
|
||||
addr = S1_ptw_translate(env, mmu_idx, addr, attrs, fsr, fi);
|
||||
if (fi->s1ptw) {
|
||||
return 0;
|
||||
}
|
||||
return address_space_ldl(cs->as, addr, attrs, NULL);
|
||||
return address_space_ldl(as, addr, attrs, NULL);
|
||||
}
|
||||
|
||||
static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure,
|
||||
|
@ -5633,13 +5635,15 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure,
|
|||
ARMCPU *cpu = ARM_CPU(cs->uc, cs);
|
||||
CPUARMState *env = &cpu->env;
|
||||
MemTxAttrs attrs = {0};
|
||||
AddressSpace *as;
|
||||
|
||||
attrs.secure = is_secure;
|
||||
as = arm_addressspace(cs, attrs);
|
||||
addr = S1_ptw_translate(env, mmu_idx, addr, attrs, fsr, fi);
|
||||
if (fi->s1ptw) {
|
||||
return 0;
|
||||
}
|
||||
return address_space_ldq(cs->as, addr, attrs, NULL);
|
||||
return address_space_ldq(as, addr, attrs, NULL);
|
||||
}
|
||||
|
||||
static bool get_phys_addr_v5(CPUARMState *env, uint32_t address,
|
||||
|
|
Loading…
Reference in a new issue