yuzu/unicorn
1
0
Fork 0
mirror of https://github.com/yuzu-emu/unicorn.git synced 2025-11-04 03:04:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

target/arm: Implement fp16 for Neon VRECPS

Browse source 
Convert the Neon VRECPS insn to using a gvec helper, and
use this to implement the fp16 case.

The phrasing of the new float32_recps_nf() is slightly different from
the old recps_f32() so that it parallels the f16 version; for f16 we
can't assume that flush-to-zero is always enabled.

Backports ac8c62c4e5a3f24e6d47f52ec1bfb20994caefa5
This commit is contained in:
Peter Maydell 2021-03-01 17:08:27 -05:00 committed by Lioncash
parent 5776c594e4
commit f4ebbba9fd
20 changed files with 67 additions and 34 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
qemu/aarch64.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_aarch64
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_aarch64
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_aarch64
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_aarch64
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_aarch64
#define helper_gvec_rotl8i helper_gvec_rotl8i_aarch64
#define helper_gvec_rotl16i helper_gvec_rotl16i_aarch64
#define helper_gvec_rotl32i helper_gvec_rotl32i_aarch64

2
qemu/aarch64eb.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_aarch64eb
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_aarch64eb
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_aarch64eb
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_aarch64eb
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_aarch64eb
#define helper_gvec_rotl8i helper_gvec_rotl8i_aarch64eb
#define helper_gvec_rotl16i helper_gvec_rotl16i_aarch64eb
#define helper_gvec_rotl32i helper_gvec_rotl32i_aarch64eb

2
qemu/arm.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_arm
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_arm
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_arm
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_arm
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_arm
#define helper_gvec_rotl8i helper_gvec_rotl8i_arm
#define helper_gvec_rotl16i helper_gvec_rotl16i_arm
#define helper_gvec_rotl32i helper_gvec_rotl32i_arm

2
qemu/armeb.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_armeb
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_armeb
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_armeb
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_armeb
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_armeb
#define helper_gvec_rotl8i helper_gvec_rotl8i_armeb
#define helper_gvec_rotl16i helper_gvec_rotl16i_armeb
#define helper_gvec_rotl32i helper_gvec_rotl32i_armeb

2
qemu/header_gen.py
View file

@ -1385,6 +1385,8 @@ symbols = (
'helper_gvec_qrdmlah_s32',
'helper_gvec_qrdmlsh_s16',
'helper_gvec_qrdmlsh_s32',
'helper_gvec_recps_nf_h',
'helper_gvec_recps_nf_s',
'helper_gvec_rotl8i',
'helper_gvec_rotl16i',
'helper_gvec_rotl32i',

2
qemu/m68k.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_m68k
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_m68k
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_m68k
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_m68k
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_m68k
#define helper_gvec_rotl8i helper_gvec_rotl8i_m68k
#define helper_gvec_rotl16i helper_gvec_rotl16i_m68k
#define helper_gvec_rotl32i helper_gvec_rotl32i_m68k

2
qemu/mips.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_mips
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_mips
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_mips
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_mips
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_mips
#define helper_gvec_rotl8i helper_gvec_rotl8i_mips
#define helper_gvec_rotl16i helper_gvec_rotl16i_mips
#define helper_gvec_rotl32i helper_gvec_rotl32i_mips

2
qemu/mips64.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_mips64
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_mips64
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_mips64
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_mips64
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_mips64
#define helper_gvec_rotl8i helper_gvec_rotl8i_mips64
#define helper_gvec_rotl16i helper_gvec_rotl16i_mips64
#define helper_gvec_rotl32i helper_gvec_rotl32i_mips64

2
qemu/mips64el.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_mips64el
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_mips64el
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_mips64el
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_mips64el
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_mips64el
#define helper_gvec_rotl8i helper_gvec_rotl8i_mips64el
#define helper_gvec_rotl16i helper_gvec_rotl16i_mips64el
#define helper_gvec_rotl32i helper_gvec_rotl32i_mips64el

2
qemu/mipsel.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_mipsel
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_mipsel
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_mipsel
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_mipsel
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_mipsel
#define helper_gvec_rotl8i helper_gvec_rotl8i_mipsel
#define helper_gvec_rotl16i helper_gvec_rotl16i_mipsel
#define helper_gvec_rotl32i helper_gvec_rotl32i_mipsel

2
qemu/powerpc.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_powerpc
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_powerpc
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_powerpc
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_powerpc
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_powerpc
#define helper_gvec_rotl8i helper_gvec_rotl8i_powerpc
#define helper_gvec_rotl16i helper_gvec_rotl16i_powerpc
#define helper_gvec_rotl32i helper_gvec_rotl32i_powerpc

2
qemu/riscv32.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_riscv32
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_riscv32
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_riscv32
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_riscv32
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_riscv32
#define helper_gvec_rotl8i helper_gvec_rotl8i_riscv32
#define helper_gvec_rotl16i helper_gvec_rotl16i_riscv32
#define helper_gvec_rotl32i helper_gvec_rotl32i_riscv32

2
qemu/riscv64.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_riscv64
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_riscv64
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_riscv64
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_riscv64
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_riscv64
#define helper_gvec_rotl8i helper_gvec_rotl8i_riscv64
#define helper_gvec_rotl16i helper_gvec_rotl16i_riscv64
#define helper_gvec_rotl32i helper_gvec_rotl32i_riscv64

2
qemu/sparc.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_sparc
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_sparc
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_sparc
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_sparc
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_sparc
#define helper_gvec_rotl8i helper_gvec_rotl8i_sparc
#define helper_gvec_rotl16i helper_gvec_rotl16i_sparc
#define helper_gvec_rotl32i helper_gvec_rotl32i_sparc

2
qemu/sparc64.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_sparc64
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_sparc64
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_sparc64
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_sparc64
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_sparc64
#define helper_gvec_rotl8i helper_gvec_rotl8i_sparc64
#define helper_gvec_rotl16i helper_gvec_rotl16i_sparc64
#define helper_gvec_rotl32i helper_gvec_rotl32i_sparc64

4
qemu/target/arm/helper.h
View file

@ -223,7 +223,6 @@ DEF_HELPER_4(vfp_muladdd, f64, f64, f64, f64, ptr)
DEF_HELPER_4(vfp_muladds, f32, f32, f32, f32, ptr)
DEF_HELPER_4(vfp_muladdh, f16, f16, f16, f16, ptr)
DEF_HELPER_3(recps_f32, f32, env, f32, f32)
DEF_HELPER_3(rsqrts_f32, f32, env, f32, f32)
DEF_HELPER_FLAGS_2(recpe_f16, TCG_CALL_NO_RWG, f16, f16, ptr)
DEF_HELPER_FLAGS_2(recpe_f32, TCG_CALL_NO_RWG, f32, f32, ptr)
@ -672,6 +671,9 @@ DEF_HELPER_FLAGS_5(gvec_fmaxnum_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i3
DEF_HELPER_FLAGS_5(gvec_fminnum_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_fminnum_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_recps_nf_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_recps_nf_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_fmla_h, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_5(gvec_fmla_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, ptr, i32)

21
qemu/target/arm/translate-neon.inc.c
View file

@ -1092,6 +1092,7 @@ DO_3S_FP_GVEC(VMLA, gen_helper_gvec_fmla_s, gen_helper_gvec_fmla_h)
DO_3S_FP_GVEC(VMLS, gen_helper_gvec_fmls_s, gen_helper_gvec_fmls_h)
DO_3S_FP_GVEC(VFMA, gen_helper_gvec_vfma_s, gen_helper_gvec_vfma_h)
DO_3S_FP_GVEC(VFMS, gen_helper_gvec_vfms_s, gen_helper_gvec_vfms_h)
DO_3S_FP_GVEC(VRECPS, gen_helper_gvec_recps_nf_s, gen_helper_gvec_recps_nf_h)
WRAP_FP_GVEC(gen_VMAXNM_fp32_3s, FPST_STD, gen_helper_gvec_fmaxnum_s)
WRAP_FP_GVEC(gen_VMAXNM_fp16_3s, FPST_STD_F16, gen_helper_gvec_fmaxnum_h)
@ -1130,26 +1131,6 @@ static bool trans_VMINNM_fp_3s(DisasContext *s, arg_3same *a)
return do_3same(s, a, gen_VMINNM_fp32_3s);
}
WRAP_ENV_FN(gen_VRECPS_tramp, gen_helper_recps_f32)
static void gen_VRECPS_fp_3s(TCGContext *s, unsigned vece, uint32_t rd_ofs,
uint32_t rn_ofs, uint32_t rm_ofs,
uint32_t oprsz, uint32_t maxsz)
{
static const GVecGen3 ops = { .fni4 = gen_VRECPS_tramp };
tcg_gen_gvec_3(s, rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, &ops);
}
static bool trans_VRECPS_fp_3s(DisasContext *s, arg_3same *a)
{
if (a->size != 0) {
/* TODO fp16 support */
return false;
}
return do_3same(s, a, gen_VRECPS_fp_3s);
}
WRAP_ENV_FN(gen_VRSQRTS_tramp, gen_helper_rsqrts_f32)
static void gen_VRSQRTS_fp_3s(TCGContext *s, unsigned vece, uint32_t rd_ofs,

31
qemu/target/arm/vec_helper.c
View file

@ -798,6 +798,34 @@ static float32 float32_abd(float32 op1, float32 op2, float_status *stat)
return float32_abs(float32_sub(op1, op2, stat));
}
/*
* Reciprocal step. These are the AArch32 version which uses a
* non-fused multiply-and-subtract.
*/
static float16 float16_recps_nf(float16 op1, float16 op2, float_status *stat)
{
op1 = float16_squash_input_denormal(op1, stat);
op2 = float16_squash_input_denormal(op2, stat);
if ((float16_is_infinity(op1) && float16_is_zero(op2)) ||
(float16_is_infinity(op2) && float16_is_zero(op1))) {
return float16_two;
}
return float16_sub(float16_two, float16_mul(op1, op2, stat), stat);
}
static float32 float32_recps_nf(float32 op1, float32 op2, float_status *stat)
{
op1 = float32_squash_input_denormal(op1, stat);
op2 = float32_squash_input_denormal(op2, stat);
if ((float32_is_infinity(op1) && float32_is_zero(op2)) ||
(float32_is_infinity(op2) && float32_is_zero(op1))) {
return float32_two;
}
return float32_sub(float32_two, float32_mul(op1, op2, stat), stat);
}
#define DO_3OP(NAME, FUNC, TYPE) \
void HELPER(NAME)(void *vd, void *vn, void *vm, void *stat, uint32_t desc) \
{ \
@ -855,6 +883,9 @@ DO_3OP(gvec_fmaxnum_s, float32_maxnum, float32)
DO_3OP(gvec_fminnum_h, float16_minnum, float16)
DO_3OP(gvec_fminnum_s, float32_minnum, float32)
DO_3OP(gvec_recps_nf_h, float16_recps_nf, float16)
DO_3OP(gvec_recps_nf_s, float32_recps_nf, float32)
#ifdef TARGET_AARCH64
DO_3OP(gvec_recps_h, helper_recpsf_f16, float16)

13
qemu/target/arm/vfp_helper.c
View file

@ -538,19 +538,6 @@ uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, void *fpstp, uint32_t ahp_mode)
return r;
}
float32 HELPER(recps_f32)(CPUARMState *env, float32 a, float32 b)
{
float_status *s = &env->vfp.standard_fp_status;
if ((float32_is_infinity(a) && float32_is_zero_or_denormal(b)) ||
(float32_is_infinity(b) && float32_is_zero_or_denormal(a))) {
if (!(float32_is_zero(a) || float32_is_zero(b))) {
float_raise(float_flag_input_denormal, s);
}
return float32_two;
}
return float32_sub(float32_two, float32_mul(a, b, s), s);
}
float32 HELPER(rsqrts_f32)(CPUARMState *env, float32 a, float32 b)
{
float_status *s = &env->vfp.standard_fp_status;

2
qemu/x86_64.h
View file

@ -1379,6 +1379,8 @@
#define helper_gvec_qrdmlah_s32 helper_gvec_qrdmlah_s32_x86_64
#define helper_gvec_qrdmlsh_s16 helper_gvec_qrdmlsh_s16_x86_64
#define helper_gvec_qrdmlsh_s32 helper_gvec_qrdmlsh_s32_x86_64
#define helper_gvec_recps_nf_h helper_gvec_recps_nf_h_x86_64
#define helper_gvec_recps_nf_s helper_gvec_recps_nf_s_x86_64
#define helper_gvec_rotl8i helper_gvec_rotl8i_x86_64
#define helper_gvec_rotl16i helper_gvec_rotl16i_x86_64
#define helper_gvec_rotl32i helper_gvec_rotl32i_x86_64